From 0fc7a1eadeae66e2049b47c0a3bdadc31a47d003 Mon Sep 17 00:00:00 2001 From: Warren Block Date: Wed, 20 Apr 2016 14:32:02 +0000 Subject: [PATCH] Whitespace-only fixes, translators please ignore. --- .../news/status/report-2016-01-2016-03.xml | 58 +++++++------------ 1 file changed, 21 insertions(+), 37 deletions(-) diff --git a/en_US.ISO8859-1/htdocs/news/status/report-2016-01-2016-03.xml b/en_US.ISO8859-1/htdocs/news/status/report-2016-01-2016-03.xml index 2243b259ee..9b1d844162 100644 --- a/en_US.ISO8859-1/htdocs/news/status/report-2016-01-2016-03.xml +++ b/en_US.ISO8859-1/htdocs/news/status/report-2016-01-2016-03.xml @@ -230,10 +230,10 @@ -

The pNFS server will be in need of testing during development - or it will never progress to a near-production status. I - hope to have code available in &os;'s Subversion project - branch for testing in late spring 2016.

+

The pNFS server will be in need of testing during + development or it will never progress to a near-production + status. I hope to have code available in &os;'s Subversion + project branch for testing in late spring 2016.

 @@ -258,13 +258,13 @@

This project aims to enable the use of the Signal Processing Engine found in the NXP/Freescale e500v2 SoC. The SPE uses - opcodes overlapping with those of Altivec, so they are mutually - exclusive. Additionally, the e500v2 does not have a traditional - FPU, and instead uses the SPE for all floating point operations - (or emulation, as is currently done). Combined with the fact - that the SPE ABI is incompatible with the traditional ABI, a new - MACHINE_ARCH has been created to address these - incompatibilities.

+ opcodes overlapping with those of Altivec, so they are + mutually exclusive. Additionally, the e500v2 does not have a + traditional FPU, and instead uses the SPE for all floating + point operations (or emulation, as is currently done). + Combined with the fact that the SPE ABI is incompatible with + the traditional ABI, a new MACHINE_ARCH has been created to + address these incompatibilities.

A project branch has been created for the work. A powerpcspe kernel boots on the RouterBoard RB800, and the base @@ -556,8 +556,8 @@

The driver supports all available Ethernet connections (1, - 10, 30 Gbps) and the system can saturate a 10 Gbps link (on Tx) - using 4 CPU cores.

+ 10, 30 Gbps) and the system can saturate a 10 Gbps link (on + Tx) using 4 CPU cores.

- - EMC / Isilon Storage Division - + EMC / Isilon Storage Division @@ -1075,9 +1069,7 @@ Mateusz Guzik.

- - EMC / Isilon Storage Division - + EMC / Isilon Storage Division @@ -1133,9 +1125,7 @@ logins once configured).

- - Alex Perez (Inertial Computing) - + Alex Perez (Inertial Computing) @@ -1352,9 +1342,7 @@ checkout.

- - Mellanox Technologies - + Mellanox Technologies @@ -1519,9 +1507,7 @@ to publish the test cases for Azure soon.

- - Microsoft - + Microsoft @@ -1764,9 +1750,7 @@ - - The FreeBSD Foundation - + The FreeBSD Foundation