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The initial value of the instruction pointer after processor reset is

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not 0xffffff00 but 0xfffffff0.  Verified by checking section 10.1 of
"Intel 80386 Reference Programmer's Manual" at:
http://people.freebsd.org/~jhb/386htm/s10_01.htm

PR:		docs/48571
Submitted by:	Rui Lopes <rui@ruilopes.com>
This commit is contained in:
Giorgos Keramidas 2003-03-01 00:56:20 +00:00
parent 9f2712705b
commit 117c7c4773
Notes: svn2git 2020-12-08 03:00:23 +00:00 
svn path=/head/; revision=16154
2 changed files with 6 additions and 6 deletions
en_US.ISO8859-1/books
arch-handbook/boot
chapter.sgml
developers-handbook/boot
chapter.sgml

6
en_US.ISO8859-1/books/arch-handbook/boot/chapter.sgml
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@ -124,7 +124,7 @@ Timecounter "i8254" frequency 1193182 Hz</screen></para></entry>
to some predefined values. One of the registers is the
<emphasis>instruction pointer</emphasis> register, and its value
after a power on is well defined: it is a 32-bit value of
0xffffff00. The instruction pointer register points to code to
0xfffffff0. The instruction pointer register points to code to
be executed by the processor. One of the registers is the
<literal>cr1</literal> 32-bit control register, and its value
just after the reboot is 0. One of the cr1's bits, the bit PE
@ -134,7 +134,7 @@ Timecounter "i8254" frequency 1193182 Hz</screen></para></entry>
among other things, that linear and physical addresses are
identical.</para>
<para>The value of 0xffffff00 is slightly less then 4Gb, so unless
<para>The value of 0xfffffff0 is slightly less then 4Gb, so unless
the machine has 4Gb physical memory, it cannot point to a valid
memory address. The computer's hardware translates this address
so that it points to a BIOS memory block.</para>
@ -144,7 +144,7 @@ Timecounter "i8254" frequency 1193182 Hz</screen></para></entry>
a relatively small amount of read-only memory (ROM). This
memory contains various low-level routines that are specific to
the hardware supplied with the motherboard. So, the processor
will first jump to the address 0xffffff00, which really resides
will first jump to the address 0xfffffff0, which really resides
in the BIOS's memory. Usually this address contains a jump
instruction to the BIOS's POST routines.</para>

6
en_US.ISO8859-1/books/developers-handbook/boot/chapter.sgml
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@ -124,7 +124,7 @@ Timecounter "i8254" frequency 1193182 Hz</screen></para></entry>
to some predefined values. One of the registers is the
<emphasis>instruction pointer</emphasis> register, and its value
after a power on is well defined: it is a 32-bit value of
0xffffff00. The instruction pointer register points to code to
0xfffffff0. The instruction pointer register points to code to
be executed by the processor. One of the registers is the
<literal>cr1</literal> 32-bit control register, and its value
just after the reboot is 0. One of the cr1's bits, the bit PE
@ -134,7 +134,7 @@ Timecounter "i8254" frequency 1193182 Hz</screen></para></entry>
among other things, that linear and physical addresses are
identical.</para>
<para>The value of 0xffffff00 is slightly less then 4Gb, so unless
<para>The value of 0xfffffff0 is slightly less then 4Gb, so unless
the machine has 4Gb physical memory, it cannot point to a valid
memory address. The computer's hardware translates this address
so that it points to a BIOS memory block.</para>
@ -144,7 +144,7 @@ Timecounter "i8254" frequency 1193182 Hz</screen></para></entry>
a relatively small amount of read-only memory (ROM). This
memory contains various low-level routines that are specific to
the hardware supplied with the motherboard. So, the processor
will first jump to the address 0xffffff00, which really resides
will first jump to the address 0xfffffff0, which really resides
in the BIOS's memory. Usually this address contains a jump
instruction to the BIOS's POST routines.</para>