Fix a few obvious spelling mistakes.
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svn2git
2020-12-08 03:00:23 +00:00
svn path=/head/; revision=45321
1 changed files with 7 additions and 7 deletions
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@ -29,7 +29,7 @@
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productive time for &os;. The Ports team released their
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productive time for &os;. The Ports team released their
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landmark first quarterly <q>stable</q> branch. &os; continues
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landmark first quarterly <q>stable</q> branch. &os; continues
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to grow on the ARM architecture, now running on an ARM-based
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to grow on the ARM architecture, now running on an ARM-based
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ChromeBook. SMP is now possible on multi-core ARM systems.
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Chromebook. SMP is now possible on multi-core ARM systems.
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bhyve, the native &os; hypervisor, continues to improve. An
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bhyve, the native &os; hypervisor, continues to improve. An
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integral test suite is taking shape, and the Jenkins Continuous
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integral test suite is taking shape, and the Jenkins Continuous
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Integration system has been implemented. &os; patches to GCC
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Integration system has been implemented. &os; patches to GCC
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@ -159,13 +159,13 @@
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server, also received a series of locking optimizations which allowed
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server, also received a series of locking optimizations which allowed
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its peak request rate to increase from ~200K to ~600K IOPS
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its peak request rate to increase from ~200K to ~600K IOPS
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with the potential of reaching a rate of 1M requests per second.
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with the potential of reaching a rate of 1M requests per second.
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That rate is sufficient to completely saturage 2x10Gbit
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That rate is sufficient to completely saturate 2x10Gbit
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Ethernet links with 4KB requests. For comparison, the port of
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Ethernet links with 4KB requests. For comparison, the port of
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net/istgt (user-level iSCSI server) on the same hardware with
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net/istgt (user-level iSCSI server) on the same hardware with
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an equivalent configuration showed only 100K IOPS.</p>
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an equivalent configuration showed only 100K IOPS.</p>
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<p>There is also ongoing work on improving CTL functionality.
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<p>There is also ongoing work on improving CTL functionality.
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It was already made to support three of four VMWare VAAI storage
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It was already made to support three of four VMware VAAI storage
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acceleration primitives (net/istgt supports 2), while the goal
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acceleration primitives (net/istgt supports 2), while the goal
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is to reach full VAAI support during next months.</p>
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is to reach full VAAI support during next months.</p>
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@ -402,7 +402,7 @@
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building</url>
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building</url>
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<url href="https://github.com/seanbruno/qemu-bsd-user">Master
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<url href="https://github.com/seanbruno/qemu-bsd-user">Master
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respository for collaboration</url>
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repository for collaboration</url>
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</links>
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</links>
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<body>
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<body>
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@ -772,7 +772,7 @@
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<p>Since the last report the following items have been
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<p>Since the last report the following items have been
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completed, which allow for a working demo of OpenStack compute
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completed, which allow for a working demo of OpenStack compute
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node on a &os; host uisng OpenContrail solution for network
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node on a &os; host using OpenContrail solution for network
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virtualization:</p>
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virtualization:</p>
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<ul>
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<ul>
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@ -874,7 +874,7 @@
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<p>&os; Foundation Systems Administrator and Release Engineer,
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<p>&os; Foundation Systems Administrator and Release Engineer,
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Glen Barber, continued work on producing regularly-updated
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Glen Barber, continued work on producing regularly-updated
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&os;/arm snapshots for embedded devices, such as the
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&os;/arm snapshots for embedded devices, such as the
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RaspberryPi, ZedBoard, and BeagleBone.</p>
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Raspberry Pi, ZedBoard, and BeagleBone.</p>
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<p>In addition to producing weekly development snapshots from
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<p>In addition to producing weekly development snapshots from
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the head/ and stable/ branches, with feedback and help from Ed
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the head/ and stable/ branches, with feedback and help from Ed
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@ -1260,7 +1260,7 @@
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<links></links>
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<links></links>
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<body>
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<body>
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<p>Building on the new in-kernel iSCSI target and initiatior
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<p>Building on the new in-kernel iSCSI target and initiator
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stack released in FreeBSD 10.0, Chelsio Communications has
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stack released in FreeBSD 10.0, Chelsio Communications has
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begun developing an offload interface to take advantage of the
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begun developing an offload interface to take advantage of the
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hardware offload capabilities of Chelsio T4 and T5 10 and 40
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hardware offload capabilities of Chelsio T4 and T5 10 and 40
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