From 80cec0601e9682edea93673df9493cd01199693d Mon Sep 17 00:00:00 2001 From: Warren Block Date: Tue, 14 Jul 2015 15:26:14 +0000 Subject: [PATCH] Add Konstantin Belousov 's PCID report. --- .../news/status/report-2015-04-2015-06.xml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml b/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml index bf091aa493..91b43a446c 100644 --- a/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml +++ b/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml @@ -1053,4 +1053,62 @@ The FreeBSD Foundation + + + Rewritten PCID Support + + + + + Konstantin + Belousov + + kib@FreeBSD.org + + + + +

Process-Context Identifiers (PCIDs) is a feature of the TLB + on Intel processors, existing since the Sandy Bridge + micro-architecture introduction. It allows the TLB to + simultaneously cache translation information for several + address spaces, and gives an opportunity for the operating + system context switch code to avoid flushing the TLB on the + process switch. Each cached translation is tagged with some + context identifier, and at context switch time, the operating + system instructs the processor which context is becoming + active. The feature slightly reduces context switch time by + avoiding flush, and more importantly, it reduces the warm-up + period for the thread after a context switch.

+ +

&os; already used PCID, but the existing implementation + had several shortcomings. The amd64 pmap (the + machine-dependent portion of the virtual memory subsystem) + maintained a bitmap of all CPUs which ever loaded a + translation for the given address space, and avoided TLB flush + on the context switch. The bitmap was used to direct + Inter-Processor Interrupts to the marked CPU when the + operating system needed to perform TLB invalidation. The most + important deficiency of the implementation is the increase of + TLB invalidation IPIs since the bitmap could only grow until + full TLB shootdown is performed. It increases the TLB rate, + which negated the positive effects of avoiding TLB flushes on + large machines. Secondarily, the bitmap maintenance in both + the pmap and the context code was quite complicated, leading + to bugs. These issues resulted in the PCID feature being + disabled by default.

+ +

The new PCID implementation uses an algorithm described in + the U. Vahalia book "UNIX Internals: The New Frontiers". The + algorithm is already used, for example, by the MIPS pmap for + assigning the ASIDs to software-managed TLB entries. The pmap + maintains a per-CPU generation count, which is assigned to the + next unused PCID when the context is activated on CPU. TLB + invalidation includes resetting the generation count, which + causes reallocation of PCID when a context switch is + performed. As result, the new implementation issues exactly + the same amount of shootdown IPIs as pmap which does not + utilize PCID.

+ +