diff --git a/en/news/status/report-2011-10-2011-12.xml b/en/news/status/report-2011-10-2011-12.xml
index af681a6c9a..f48c66e140 100644
--- a/en/news/status/report-2011-10-2011-12.xml
+++ b/en/news/status/report-2011-10-2011-12.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="ISO-8859-1" ?>
 <!DOCTYPE report PUBLIC "-//FreeBSD//DTD FreeBSD XML Database for Status
 Report//EN" "http://www.FreeBSD.org/XML/www/share/sgml/statusreport.dtd">
-<!-- $FreeBSD: www/en/news/status/report-2011-10-2011-12.xml,v 1.4 2012/01/25 13:22:42 uqs Exp $ -->
+<!-- $FreeBSD: www/en/news/status/report-2011-10-2011-12.xml,v 1.5 2012/01/25 13:50:42 danger Exp $ -->
 <report>
   <date>
     <month>October-December</month>
@@ -1797,11 +1797,11 @@ Report//EN" "http://www.FreeBSD.org/XML/www/share/sgml/statusreport.dtd">
 
       <p>Forthcoming IvyBridge CPUs promised to provide optimizations in
 	the form of INVPCID instructions that allow to optimize TLB
-	shootdown handlers.  Patch above uses the instruction on the
+	shootdown handlers. The patch above uses the instruction on the
 	capable CPU.  Todo items are to get access to IvyBridge and do the
 	benchmarks.</p>
 
-      <p>Future work might provde SEP support, use hardware random
+      <p>Future work might provide SEP support, use hardware random
 	generator from IvyBridge for random(4), considering using faster
 	instructions to access fs% and gs% bases, and use improved AES-NI
 	instruction set for aesni(4).</p>