Syntax and grammar fixes.

PR:		docs/34913
Submitted by:	Ceri <setantae@submonkey.net>
This commit is contained in:
Giorgos Keramidas 2002-02-14 13:20:33 +00:00
parent 92d4fcd184
commit 924220591d
Notes: svn2git 2020-12-08 03:00:23 +00:00
svn path=/head/; revision=12178

View file

@ -137,7 +137,7 @@
which indicates that the counter has reached zero and no more data
will be transferred until the DMA controller is reprogrammed by the
CPU. This event is also called the Terminal Count (TC). There is only
one EOP signal, and since only DMA channel can be active at any
one EOP signal, and since only one DMA channel can be active at any
instant, the DMA channel that is currently active must be the DMA
channel that just completed its task.</para>
@ -155,7 +155,7 @@
<para>It is important to understand that although the CPU always
releases the bus to the DMA when the DMA makes the request, this
action is invisible to both applications and the operating systems,
action is invisible to both applications and the operating system,
except for slight changes in the amount of time the processor takes to
execute instructions when the DMA is active. Subsequently, the
processor must poll the peripheral, poll the registers in the DMA
@ -226,7 +226,7 @@
<note>
<para>A new implementation of the 8237, called the 82374, allows 16
bits of page register to be specified, allows access to the entire
bits of page register to be specified and enables access to the entire
32 bit address space, without the use of bounce buffers.</para>
</note>
</sect2>
@ -372,7 +372,7 @@
the peripheral requests transfers, they will be granted. It is
up to the CPU to move new data into the fixed buffer ahead of
where the DMA is about to transfer it when doing output
operations, and read new data out of the buffer behind where the
operations, and to read new data out of the buffer behind where the
DMA is writing when doing input operations.</para>
<para>This technique is frequently used on audio devices that have