diff --git a/en_US.ISO8859-1/books/arch-handbook/boot/chapter.sgml b/en_US.ISO8859-1/books/arch-handbook/boot/chapter.sgml index 0acab47ae0..b5257601a2 100644 --- a/en_US.ISO8859-1/books/arch-handbook/boot/chapter.sgml +++ b/en_US.ISO8859-1/books/arch-handbook/boot/chapter.sgml @@ -138,7 +138,7 @@ Timecounter "i8254" frequency 1193182 Hz be executed by the processor. One of the registers is the cr0 32-bit control register, and its value just after the reboot is 0. One of the cr0's bits, the bit PE - (Protected Enabled) indicates whether the processor is running + (Protection Enabled) indicates whether the processor is running in protected or real mode. Since at boot time this bit is cleared, the processor boots in real mode. Real mode means, among other things, that linear and physical addresses are