doc/share/security/patches/EN-17:01/pcie.patch
2017-02-23 07:28:05 +00:00

11 lines
286 B
Diff

--- sys/dev/pci/pci_pci.c.orig
+++ sys/dev/pci/pci_pci.c
@@ -935,6 +935,8 @@
if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_HPC) == 0)
return;
+ if ((sc->pcie_link_cap & PCIEM_LINK_CAP_DL_ACTIVE) == 0)
+ return;
/*
* Some devices report that they have an MRL when they actually