/* Copyright (C) 2021,2022 fef <owo@fef.moe>.  All rights reserved. */

#pragma once

/** @brief Arch specific maximum number of IRQs (x86 8259 PIC version) */
#define NUM_IRQ 16

#include <gay/cdefs.h>

/** @brief Low level interrupt controller init routine (x86 version). */
void arch_irq_init(void);

/**
 * @brief Low level IRQ unmasking routine (x86 version).
 * All of the sanity checks have already been done in `irq_enable()`, so this
 * method expects the IRQ number to be valid and have an associated handler.
 *
 * @param number IRQ number
 */
void arch_irq_enable(unsigned int number);

/**
 * @brief Low level IRQ masking routine (x86 version).
 * Like with `arch_irq_enable()`, this method does not do error checking.
 *
 * @param number IRQ number
 */
void arch_irq_disable(unsigned int number);

/* generated in irq.S */
extern void _x86_isr_irq0(void);
extern void _x86_isr_irq1(void);
extern void _x86_isr_irq3(void);
extern void _x86_isr_irq4(void);
extern void _x86_isr_irq5(void);
extern void _x86_isr_irq6(void);
extern void _x86_isr_irq7(void);
extern void _x86_isr_irq8(void);
extern void _x86_isr_irq9(void);
extern void _x86_isr_irq10(void);
extern void _x86_isr_irq11(void);
extern void _x86_isr_irq12(void);
extern void _x86_isr_irq13(void);
extern void _x86_isr_irq14(void);
extern void _x86_isr_irq15(void);