/* Copyright (C) 2021,2022 fef . All rights reserved. */ #pragma once #include #define X86_32_KERN_CS 0x10 #define X86_32_USER_CS 0x18 #define X86_64_KERN_CS 0x20 #define X86_64_USER_CS 0x28 #define X86_KERN_DS 0x30 #define X86_USER_DS 0x38 #define X86_KERN_TSS 0x40 #define X86_USER_TSS 0x50 #ifndef _ASM_SOURCE /* * This code is mostly obsolete (until we need to actually manipulate the GDT * when there is long mode support and we want to enable 32-bit compatibility * mode). I wrote this because i initially wanted to use it for an encoder that * would dynamically initialize the GDT entries at runtime, but fuck that. * I've lost way more than enough time on the utterly useless GDT, so we'll just * leave this here as it is until we actually need it. See arch/mm/segment.S * for the actual GDT entries and how the GDT is loaded. */ #include #include #include /** @brief x86 Global Descriptor Table entry as used by the kernel. */ struct x86_gdt_entry { u32 base; unsigned limit:20; unsigned flags:4; #define X86_GDT_SIZE (1u << 2) #define X86_GDT_GRANULARITY (1u << 3) u8 access; #define X86_GDT_ACCESSED (1u << 0) #define X86_GDT_RW (1u << 1) #define X86_GDT_DIRECTION (1u << 2) /* for data selectors (executable not set) */ #define X86_GDT_CONFORMING (1u << 2) /* for code selectors (executable set) */ #define X86_GDT_EXEC (1u << 3) #define X86_GDT_TYPE (1u << 4) /* 1 for code/data, 0 for system (e.g. TSS) */ #define X86_GDT_PRIVL_SHIFT (5) #define X86_GDT_PRIVL_MASK (3u << X86_GDT_PRIVL_SHIFT) #define X86_GDT_PRIVL(n) (((n) << X86_GDT_PRIVL_SHIFT) & X86_GDT_PRIVL_MASK) #define X86_GDT_PRESENT (1u << 7) }; /** @brief x86 Global Descriptor Table entry as laid out in hardware. */ struct x86_insane_gdt_entry { u16 limit0; u16 base0; u8 base1; u8 access; unsigned limit1:4; unsigned flags:4; u8 base2; } __packed; /** @brief The main GDT (defined in `arch/mm/segment.S`) */ extern struct x86_insane_gdt_entry x86_gdt[5]; struct x86_tss { u16 link; u16 _reserved0; u32 esp0; u16 ss0; u16 _reserved1; u32 esp1; u16 ss1; u16 _reserved2; u32 esp2; u16 ss2; u16 _reserved3; u32 cr3; u32 eip; u32 eflags; u32 eax; u32 ecx; u32 edx; u32 ebx; u32 esp; u32 ebp; u32 esi; u32 edi; u16 es; u16 _reserved4; u16 cs; u16 _reserved5; u16 ss; u16 _reserved6; u16 ds; u16 _reserved7; u16 fs; u16 _reserved8; u16 gs; u16 _reserved9; u16 ldtr; u16 _reserved10; u16 _reserved11; u16 iopb_offset; }; #endif /* not _ASM_SOURCE */