sched: properly disable the watchdog

I have no idea what the FUCK the Engineers at ARM were thinking when
they decided to disable EVERY SINGLE FUCKING CPU COMPONENT on system
reset, except the FUCKING WATCHDOG.  But this change will prevent the
system from randomly firing a watchdog reset.
io-wait
Felix Kopp 3 years ago
parent c222c35fe5
commit 589e9330da
No known key found for this signature in database
GPG Key ID: C478BA0A85F75728

@ -32,7 +32,8 @@ ARDIX_SOURCES += \
$(ARDIX_ARCH_PWD)/serial.c \
$(ARDIX_ARCH_PWD)/spinlock.c \
$(ARDIX_ARCH_PWD)/startup.c \
$(ARDIX_ARCH_PWD)/sys.c
$(ARDIX_ARCH_PWD)/sys.c \
$(ARDIX_ARCH_PWD)/watchdog.c
ARDIX_ASM_SOURCES += \
$(ARDIX_ARCH_PWD)/irq_pend_sv.S

@ -0,0 +1,38 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* See the end of this file for copyright, licensing, and warranty information. */
#include <arch/at91sam3x8e/hardware.h>
#include <arch/watchdog.h>
int arch_watchdog_init(void)
{
/* we don't use the watchdog at all for now */
REG_WDT_MR = REG_WDT_MR_WDDIS_BIT;
return 0;
}
/*
* Copyright (c) 2020 Felix Kopp <sandtler@sandtler.club>
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
* WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

@ -449,6 +449,47 @@ struct reg_snapshot {
/** EEFC Ready Interrupt Enable bitmask */
#define REG_EEFC_FRDY_BIT ((uint32_t)1)
/*
* Watchdog Timer (WDT)
*/
/** Watchdog Timer Control Register */
#define REG_WDT_CR (*(uint32_t *)0x400E1A50U)
/** Watchdog Timer magic */
#define REG_WDT_CR_KEY ((uint32_t)0xA5U << 24)
/** Watchdog Restart bit */
#define REG_WDT_CR_WDRSTT_BIT ((uint32_t)1)
/** Watchdog Timer Mode Register */
#define REG_WDT_MR (*(uint32_t *)0x400E1A54U)
/** Watchdog Idle Halt bit */
#define REG_WDT_MR_WDIDLEHLT_BIT ((uint32_t)1 << 29)
/** Watchdog Debug Halt bit */
#define REG_WDT_MR_WDDBGHLT_BIT ((uint32_t)1 << 28)
/** Watchdog Delta Value bitmask */
#define REG_WDT_MR_WDD_MASK ((uint32_t)0xFFF << 16)
/** Set the Watchdog Delta Value */
#define REG_WDT_MR_WDD_VAL(x) ( ((uint32_t)(x) << 16) & REG_WDT_MR_WDD_MASK )
/** Watchdog Disable bit */
#define REG_WDT_MR_WDDIS_BIT ((uint32_t)1 << 15)
/** Watchdog Reset Processor bit */
#define REG_WDT_MR_WDRPROC_BIT ((uint32_t)1 << 14)
/** Watchdog Reset Enable bit */
#define REG_WDT_MR_WDRSTEN_BIT ((uint32_t)1 << 13)
/** Watchdog Fault Interrupt Enable bit */
#define REG_WDT_MR_WDFIEN_BIT ((uint32_t)1 << 12)
/** Watchdog Counter Value bitmask */
#define REG_WDT_MR_WDV_MASK ((uint32_t)0xFFF)
/** Get or set the Watchdog counter value */
#define REG_WDT_MR_WDV_VAL(x) ( ((uint32_t)(x)) & REG_WDT_MR_WDV_MASK )
/** Watchdog Timer Status Register */
#define REG_WDT_SR (*(uint32_t *)0x400E1A58U)
/** Watchdog Error bit */
#define REG_WDT_SR_WDERR_BIT ((uint32_t)1 << 1)
/** Watchdog Underflow bit */
#define REG_WDT_SR_WDUNF_BIT ((uint32_t)1)
/*
* Power Management Controller (PMC)
*/

@ -0,0 +1,32 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* See the end of this file for copyright, licensing, and warranty information. */
#pragma once
/** Initialize the platform's watchdog. */
int arch_watchdog_init(void);
/*
* Copyright (c) 2020 Felix Kopp <sandtler@sandtler.club>
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
* WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

@ -2,6 +2,7 @@
/* See the end of this file for copyright, licensing, and warranty information. */
#include <arch/sched.h>
#include <arch/watchdog.h>
#include <ardix/atomic.h>
#include <ardix/malloc.h>
@ -35,7 +36,12 @@ int sched_init(void)
for (i = 1; i < CONFIG_SCHED_MAXPROC; i++)
proc_table[i] = NULL;
return arch_sched_hwtimer_init(CONFIG_SCHED_INTR_FREQ);
i = arch_watchdog_init();
if (i == 0)
i = arch_sched_hwtimer_init(CONFIG_SCHED_MAXPROC);
return i;
}
/**

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