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Rename to IRQ

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pull/1/head
Felix Kopp 4 years ago
parent a4e244e7fc
commit a8574dc17a
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GPG Key ID: C478BA0A85F75728
6 changed files with 166 additions and 166 deletions
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2
arch/at91sam3x8e/Makefile
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@ -31,7 +31,7 @@ ARDIX_SOURCES += \
$(ARDIX_ARCH_PWD)/sys.c
ARDIX_ASM_SOURCES += \
$(ARDIX_ARCH_PWD)/isr_pend_sv.S
$(ARDIX_ARCH_PWD)/irq_pend_sv.S
CFLAGS += \
-DARCH_AT91SAM3X8E

12
arch/at91sam3x8e/isr_pend_sv.S → arch/at91sam3x8e/irq_pend_sv.S
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@ -33,11 +33,11 @@
.extern sched_process_switch
.thumb_func
.global isr_pend_sv
.type isr_pend_sv, %function
.global irq_pend_sv
.type irq_pend_sv, %function
/* void isr_pend_sv(void); */
isr_pend_sv:
/* void irq_pend_sv(void); */
irq_pend_sv:
/*
* There seems to be a limitation in Thumb which prohibits popping to
* any register > r7. Hence, we need to split the PUSHes and POPs into
@ -47,7 +47,7 @@ isr_pend_sv:
/*
* Some registers have already been saved by hardware at this point,
* we only need to take care of r4-r11 and lr (the latter of which is
* required because lr is overwritten when entering the isr).
* required because lr is overwritten when entering the irq).
* The stuff we push onto the stack manually looks about like this:
*
* >>> stack grow direction >>>
@ -95,4 +95,4 @@ isr_pend_sv:
*/
bx lr
.size isr_pend_sv, .-isr_pend_sv
.size irq_pend_sv, .-irq_pend_sv

2
arch/at91sam3x8e/sched.c
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@ -45,7 +45,7 @@ static __always_inline void sched_pendsv_req(void)
REG_SCB_ICSR |= REG_SCB_ICSR_PENDSVSET_BIT;
}
void isr_sys_tick(void)
void irq_sys_tick(void)
{
/*
* fire a PendSV interrupt and do the actual context switching there

204
arch/at91sam3x8e/startup.c
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@ -45,7 +45,7 @@ extern uint32_t _estack; /* stack end */
/* implementation in init/main.c */
void do_bootstrap(void);
void isr_reset(void)
void irq_reset(void)
{
memmove(
&_srelocate,
@ -66,130 +66,130 @@ void isr_reset(void)
}
/**
* Default ISR for unimplemented interrupts.
* Default IRQ for unimplemented interrupts.
* This will halt the system.
*/
void isr_stub(void)
void irq_stub(void)
{
while (1);
}
__weak __alias(isr_stub) void isr_nmi(void);
__weak __alias(isr_stub) void isr_hard_fault(void);
__weak __alias(isr_stub) void isr_mem_fault(void);
__weak __alias(isr_stub) void isr_bus_fault(void);
__weak __alias(isr_stub) void isr_usage_fault(void);
__weak __alias(isr_stub) void isr_svc(void);
__weak __alias(isr_stub) void isr_debug_mon(void);
__weak __alias(isr_stub) void isr_pend_sv(void);
__weak __alias(isr_stub) void isr_sys_tick(void);
__weak __alias(irq_stub) void irq_nmi(void);
__weak __alias(irq_stub) void irq_hard_fault(void);
__weak __alias(irq_stub) void irq_mem_fault(void);
__weak __alias(irq_stub) void irq_bus_fault(void);
__weak __alias(irq_stub) void irq_usage_fault(void);
__weak __alias(irq_stub) void irq_svc(void);
__weak __alias(irq_stub) void irq_debug_mon(void);
__weak __alias(irq_stub) void irq_pend_sv(void);
__weak __alias(irq_stub) void irq_sys_tick(void);
__weak __alias(isr_stub) void isr_supc(void);
__weak __alias(isr_stub) void isr_rstc(void);
__weak __alias(isr_stub) void isr_rtc(void);
__weak __alias(isr_stub) void isr_rtt(void);
__weak __alias(isr_stub) void isr_wdt(void);
__weak __alias(isr_stub) void isr_pmc(void);
__weak __alias(isr_stub) void isr_efc0(void);
__weak __alias(isr_stub) void isr_efc1(void);
__weak __alias(isr_stub) void isr_uart(void);
__weak __alias(isr_stub) void isr_smc(void);
__weak __alias(isr_stub) void isr_pioa(void);
__weak __alias(isr_stub) void isr_piob(void);
__weak __alias(isr_stub) void isr_pioc(void);
__weak __alias(isr_stub) void isr_piod(void);
__weak __alias(isr_stub) void isr_usart0(void);
__weak __alias(isr_stub) void isr_usart1(void);
__weak __alias(isr_stub) void isr_usart2(void);
__weak __alias(isr_stub) void isr_usart3(void);
__weak __alias(isr_stub) void isr_hsmci(void);
__weak __alias(isr_stub) void isr_twi0(void);
__weak __alias(isr_stub) void isr_twi1(void);
__weak __alias(isr_stub) void isr_spi0(void);
__weak __alias(isr_stub) void isr_ssc(void);
__weak __alias(isr_stub) void isr_tc0(void);
__weak __alias(isr_stub) void isr_tc1(void);
__weak __alias(isr_stub) void isr_tc2(void);
__weak __alias(isr_stub) void isr_tc3(void);
__weak __alias(isr_stub) void isr_tc4(void);
__weak __alias(isr_stub) void isr_tc5(void);
__weak __alias(isr_stub) void isr_tc6(void);
__weak __alias(isr_stub) void isr_tc7(void);
__weak __alias(isr_stub) void isr_tc8(void);
__weak __alias(isr_stub) void isr_pwm(void);
__weak __alias(isr_stub) void isr_adc(void);
__weak __alias(isr_stub) void isr_dacc(void);
__weak __alias(isr_stub) void isr_dmac(void);
__weak __alias(isr_stub) void isr_uotghs(void);
__weak __alias(isr_stub) void isr_trng(void);
__weak __alias(isr_stub) void isr_emac(void);
__weak __alias(isr_stub) void isr_can0(void);
__weak __alias(isr_stub) void isr_can1(void);
__weak __alias(irq_stub) void irq_supc(void);
__weak __alias(irq_stub) void irq_rstc(void);
__weak __alias(irq_stub) void irq_rtc(void);
__weak __alias(irq_stub) void irq_rtt(void);
__weak __alias(irq_stub) void irq_wdt(void);
__weak __alias(irq_stub) void irq_pmc(void);
__weak __alias(irq_stub) void irq_efc0(void);
__weak __alias(irq_stub) void irq_efc1(void);
__weak __alias(irq_stub) void irq_uart(void);
__weak __alias(irq_stub) void irq_smc(void);
__weak __alias(irq_stub) void irq_pioa(void);
__weak __alias(irq_stub) void irq_piob(void);
__weak __alias(irq_stub) void irq_pioc(void);
__weak __alias(irq_stub) void irq_piod(void);
__weak __alias(irq_stub) void irq_usart0(void);
__weak __alias(irq_stub) void irq_usart1(void);
__weak __alias(irq_stub) void irq_usart2(void);
__weak __alias(irq_stub) void irq_usart3(void);
__weak __alias(irq_stub) void irq_hsmci(void);
__weak __alias(irq_stub) void irq_twi0(void);
__weak __alias(irq_stub) void irq_twi1(void);
__weak __alias(irq_stub) void irq_spi0(void);
__weak __alias(irq_stub) void irq_ssc(void);
__weak __alias(irq_stub) void irq_tc0(void);
__weak __alias(irq_stub) void irq_tc1(void);
__weak __alias(irq_stub) void irq_tc2(void);
__weak __alias(irq_stub) void irq_tc3(void);
__weak __alias(irq_stub) void irq_tc4(void);
__weak __alias(irq_stub) void irq_tc5(void);
__weak __alias(irq_stub) void irq_tc6(void);
__weak __alias(irq_stub) void irq_tc7(void);
__weak __alias(irq_stub) void irq_tc8(void);
__weak __alias(irq_stub) void irq_pwm(void);
__weak __alias(irq_stub) void irq_adc(void);
__weak __alias(irq_stub) void irq_dacc(void);
__weak __alias(irq_stub) void irq_dmac(void);
__weak __alias(irq_stub) void irq_uotghs(void);
__weak __alias(irq_stub) void irq_trng(void);
__weak __alias(irq_stub) void irq_emac(void);
__weak __alias(irq_stub) void irq_can0(void);
__weak __alias(irq_stub) void irq_can1(void);
__section(.vectors) const void *exception_table[] = {
&_estack, /* initial SP value (stack grows down) */
&isr_reset, /* reset vector */
&irq_reset, /* reset vector */
NULL, /* reserved */
&isr_hard_fault, /* hard fault */
&isr_mem_fault, /* hemory management fault */
&isr_bus_fault, /* bus fault */
&isr_usage_fault, /* usage fault */
&irq_hard_fault, /* hard fault */
&irq_mem_fault, /* hemory management fault */
&irq_bus_fault, /* bus fault */
&irq_usage_fault, /* usage fault */
NULL, /* reserved */
NULL, /* reserved */
NULL, /* reserved */
NULL, /* reserved */
&isr_svc, /* SVC call (used for syscalls) */
&isr_debug_mon, /* reserved for debug */
&irq_svc, /* SVC call (used for syscalls) */
&irq_debug_mon, /* reserved for debug */
NULL, /* reserved */
&isr_pend_sv, /* PendSV (used by the scheduler) */
&isr_sys_tick, /* SysTick */
&irq_pend_sv, /* PendSV (used by the scheduler) */
&irq_sys_tick, /* SysTick */
/*
* Ok I am REALLY tired of writing out mnemonics.
* Just have a look at include/arch/at91sam3x8e.h for details.
*/
&isr_rstc,
&isr_rtc,
&isr_rtt,
&isr_wdt,
&isr_pmc,
&isr_efc0,
&isr_efc1,
&isr_uart,
&isr_smc,
&irq_rstc,
&irq_rtc,
&irq_rtt,
&irq_wdt,
&irq_pmc,
&irq_efc0,
&irq_efc1,
&irq_uart,
&irq_smc,
NULL, /* reserved */
&isr_pioa,
&isr_piob,
&isr_pioc,
&isr_piod,
&irq_pioa,
&irq_piob,
&irq_pioc,
&irq_piod,
NULL, /* reserved */
NULL, /* reserved */
&isr_usart0,
&isr_usart1,
&isr_usart2,
&isr_usart3,
&isr_hsmci,
&isr_twi0,
&isr_twi1,
&isr_spi0,
&irq_usart0,
&irq_usart1,
&irq_usart2,
&irq_usart3,
&irq_hsmci,
&irq_twi0,
&irq_twi1,
&irq_spi0,
NULL, /* reserved */
&isr_ssc,
&isr_tc0,
&isr_tc1,
&isr_tc2,
&isr_tc3,
&isr_tc4,
&isr_tc5,
&isr_tc6,
&isr_tc7,
&isr_tc8,
&isr_pwm,
&isr_adc,
&isr_dacc,
&isr_dmac,
&isr_uotghs,
&isr_trng,
&isr_emac,
&isr_can0,
&isr_can1,
&irq_ssc,
&irq_tc0,
&irq_tc1,
&irq_tc2,
&irq_tc3,
&irq_tc4,
&irq_tc5,
&irq_tc6,
&irq_tc7,
&irq_tc8,
&irq_pwm,
&irq_adc,
&irq_dacc,
&irq_dmac,
&irq_uotghs,
&irq_trng,
&irq_emac,
&irq_can0,
&irq_can1,
};

8
include/arch/at91sam3x8e/hardware.h
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@ -37,7 +37,7 @@ extern uint32_t sys_core_clock;
/**
* A software snapshot of all registers that have not been saved by automated
* hardware routines on ISR entry. Required for scheduling / context switching.
* hardware routines on IRQ entry. Required for scheduling / context switching.
*/
struct reg_sw_snapshot {
uint32_t r8;
@ -46,7 +46,7 @@ struct reg_sw_snapshot {
uint32_t r11;
/*
* lr is saved by hardware, but we need to store it twice
* because the ISR entry overwrites it
* because the IRQ entry overwrites it
*/
void *lr; /* alias r14 */
uint32_t r4;
@ -57,7 +57,7 @@ struct reg_sw_snapshot {
/**
* All registers that are automatically saved by hardware routines when entering
* an ISR, in the correct order.
* an IRQ, in the correct order.
*/
struct reg_hw_snapshot {
uint32_t r0;
@ -184,7 +184,7 @@ struct reg_snapshot {
/** ICSR SysTick exception clear-pending bit bitmask */
#define REG_SCB_ICSR_PENDSTCLR_BIT ((uint32_t)1 << 25)
/** ICSR Interrupt pending flag, excluding Faults bitmask */
#define REG_SCB_ICSR_ISRPENDING_BIT ((uint32_t)1 << 22)
#define REG_SCB_ICSR_IRQPENDING_BIT ((uint32_t)1 << 22)
/**
* ICSR bitmask for highest priority pending & enabled exception
* (for `SCB_ICSR`). The value is shifted 12 to the left.

104
include/arch/at91sam3x8e/interrupt.h
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@ -28,108 +28,108 @@
#pragma once
/** Reset interrupt handler */
void isr_reset(void);
void irq_reset(void);
/** Non-maskable interrupt handler */
void isr_nmi(void);
void irq_nmi(void);
/** Hard fault inerrupt handler */
void isr_hard_fault(void);
void irq_hard_fault(void);
/** Memory management fault interrupt handler */
void isr_mem_fault(void);
void irq_mem_fault(void);
/** Bus fault interrupt handler */
void isr_bus_fault(void);
void irq_bus_fault(void);
/** Usage fault (illegal instruction) interrupt handler */
void isr_usage_fault(void);
void irq_usage_fault(void);
/** SVC interrupt handler */
void isr_svc(void);
void irq_svc(void);
/** Debug handler (reserved) */
void isr_debug_mon(void);
void irq_debug_mon(void);
/** Pending SV interrupt handler */
extern void isr_pend_sv(void);
extern void irq_pend_sv(void);
/** SysTick interrupt handler */
void isr_sys_tick(void);
void irq_sys_tick(void);
/** Supply Controller (0) interrupt handler */
void isr_supc(void);
void irq_supc(void);
/** Reset Controller (1) interrupt handler */
void isr_rstc(void);
void irq_rstc(void);
/** Real-time Clock (2) interrupt handler */
void isr_rtc(void);
void irq_rtc(void);
/** Real-time Timer (3) interrupt handler */
void isr_rtt(void);
void irq_rtt(void);
/** Watchdog Timer (4) interrupt handler */
void isr_wdt(void);
/** Power Management Controller (5) interrupt handdler */
void isr_pmc(void);
void irq_wdt(void);
/** Power Management Controller (5) interrupt handler */
void irq_pmc(void);
/** Embedded Flash Controller 0 (6) interrupt handler */
void isr_efc0(void);
void irq_efc0(void);
/** Embedded Flash Controller 1 (7) interrupt handler */
void isr_efc1(void);
void irq_efc1(void);
/** Universal Asynchronous Receiver Transmitter (8) interrupt handler */
void isr_uart(void);
void irq_uart(void);
/** Static Memory Controller (9) interrupt handler */
void isr_smc(void);
void irq_smc(void);
/** Parallel I/O Controller A (11) interrupt handler */
void isr_pioa(void);
void irq_pioa(void);
/** Parallel I/O Controller B (12) interrupt handler */
void isr_piob(void);
void irq_piob(void);
/** Parallel I/O Controller C (13) interrupt handler */
void isr_pioc(void);
void irq_pioc(void);
/** Parallel I/O Controller D (14) interrupt handler */
void isr_piod(void);
void irq_piod(void);
/** Universal Synchronous/Asynchronous Receiver Transmitter 0 (17) interrupt handler */
void isr_usart0(void);
void irq_usart0(void);
/** Universal Synchronous/Asynchronous Receiver Transmitter 1 (18) interrupt handler */
void isr_usart1(void);
void irq_usart1(void);
/** Universal Synchronous/Asynchronous Receiver Transmitter 2 (19) interrupt handler */
void isr_usart2(void);
void irq_usart2(void);
/** Universal Synchronous/Asynchronous Receiver Transmitter 3 (20) interrupt handler */
void isr_usart3(void);
void irq_usart3(void);
/** Multimedia Card Interface (21) interrupt handler */
void isr_hsmci(void);
void irq_hsmci(void);
/** Two-Wire Interface 0 (22) interrupt handler */
void isr_twi0(void);
void irq_twi0(void);
/** Two-Wire Interface 1 (23) interrupt handler */
void isr_twi1(void);
void irq_twi1(void);
/** Serial Peripheral Interface 0 (24) interrupt handler */
void isr_spi0(void);
void irq_spi0(void);
/** Synchronous Serial Controller (26) interrupt handler */
void isr_ssc(void);
void irq_ssc(void);
/** Timer/Counter 0 (27) interrupt handler */
void isr_tc0(void);
void irq_tc0(void);
/** Timer/Counter 1 (28) interrupt handler */
void isr_tc1(void);
void irq_tc1(void);
/** Timer/Counter 2 (29) interrupt handler */
void isr_tc2(void);
void irq_tc2(void);
/** Timer/Counter 3 (30) interrupt handler */
void isr_tc3(void);
void irq_tc3(void);
/** Timer/Counter 4 (31) interrupt handler */
void isr_tc4(void);
void irq_tc4(void);
/** Timer/Counter 5 (32) interrupt handler */
void isr_tc5(void);
void irq_tc5(void);
/** Timer/Counter 6 (33) interrupt handler */
void isr_tc6(void);
void irq_tc6(void);
/** Timer/Counter 7 (34) interrupt handler */
void isr_tc7(void);
void irq_tc7(void);
/** Timer/Counter 8 (35) interrupt handler */
void isr_tc8(void);
void irq_tc8(void);
/** Pulse Width Modulation Controller (36) interrupt handler */
void isr_pwm(void);
void irq_pwm(void);
/** Analog to Digital Converter Controller (37) interrupt handler */
void isr_adc(void);
void irq_adc(void);
/** Digital to Analog Converter Controller (38) interrupt handler */
void isr_dacc(void);
void irq_dacc(void);
/** Direct Memory Access Controller (39) interrupt handler */
void isr_dmac(void);
void irq_dmac(void);
/** USB OTG High Speed (40) interrupt handler */
void isr_uotghs(void);
void irq_uotghs(void);
/** True Random Number Generator (41) interrupt handler */
void isr_trng(void);
void irq_trng(void);
/** Ethernet MAC (42) interrupt handler */
void isr_emac(void);
void irq_emac(void);
/** Controller Area Network 0 (43) interrupt handler */
void isr_can0(void);
void irq_can0(void);
/** Controller Area Network 1 (44) interrupt handler */
void isr_can1(void);
void irq_can1(void);
/**
* Interrupt numbers for sam3x8e

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