69 lines
1.5 KiB
ArmAsm
69 lines
1.5 KiB
ArmAsm
/* See the end of this file for copyright, license, and warranty information. */
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.syntax unified
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.thumb
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.cpu cortex-m3
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.macro func_begin name
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.global \name
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.type \name, "function"
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\name :
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.endm
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.macro func_end name
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.size \name, .-\name
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.endm
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.macro prepare_entry
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/*
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* Hardware automatically saves r0-r3, r12, pc, lr, and psr onto the
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* stack that was used before exception entry. Bit 2 in lr is 1 if the
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* psp was used, and 0 if msp was used. We store the appropriate stack
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* pointer into r12 and push it onto the stack
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*/
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tst lr, #(1 << 2)
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ite ne
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mrsne r12, psp
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moveq r12, sp
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/*
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* The kernel doesn't like to be interrupted.
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* We don't wanna be impolite and hurt its feelings.
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*/
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cpsid i
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/*
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* This push matches struct exc_context, r12 is the old stack pointer
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* (which conveniently points to the remaining registers that were
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* saved by hardware, including the original value of r12 before entry).
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*/
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push {r4-r12,lr}
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.endm
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.macro prepare_leave
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pop {r4-r12,lr}
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clrex
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/* Turn interrupts back on */
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cpsie i
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tst lr, #(1 << 2)
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ite ne
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msrne psp, r12
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moveq sp, r12
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.endm prepare_leave
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/*
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* This file is part of Ardix.
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* Copyright (c) 2021 Felix Kopp <owo@fef.moe>.
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*
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* Ardix is non-violent software: you may only use, redistribute,
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* and/or modify it under the terms of the CNPLv6+ as found in
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* the LICENSE file in the source code root directory or at
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* <https://git.pixie.town/thufie/CNPL>.
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*
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* Ardix comes with ABSOLUTELY NO WARRANTY, to the extent
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* permitted by applicable law. See the CNPLv6+ for details.
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*/
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