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/* Copyright (C) 2021,2022 fef <owo@fef.moe>. All rights reserved. */
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#pragma once
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/** @brief Arch specific maximum number of IRQs (x86 8259 PIC version) */
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#define NUM_IRQ 16
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#include <gay/cdefs.h>
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/** @brief Low level interrupt controller init routine (x86 version). */
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void arch_irq_init(void);
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/**
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* @brief Low level IRQ unmasking routine (x86 version).
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* All of the sanity checks have already been done in `irq_enable()`, so this
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* method expects the IRQ number to be valid and have an associated handler.
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*
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* @param number IRQ number
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*/
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void arch_irq_enable(unsigned int number);
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/**
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* @brief Low level IRQ masking routine (x86 version).
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* Like with `arch_irq_enable()`, this method does not do error checking.
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*
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* @param number IRQ number
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*/
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void arch_irq_disable(unsigned int number);
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/* generated in irq.S */
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extern void _x86_isr_irq0(void);
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extern void _x86_isr_irq1(void);
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extern void _x86_isr_irq3(void);
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extern void _x86_isr_irq4(void);
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extern void _x86_isr_irq5(void);
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extern void _x86_isr_irq6(void);
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extern void _x86_isr_irq7(void);
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extern void _x86_isr_irq8(void);
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extern void _x86_isr_irq9(void);
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extern void _x86_isr_irq10(void);
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extern void _x86_isr_irq11(void);
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extern void _x86_isr_irq12(void);
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extern void _x86_isr_irq13(void);
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extern void _x86_isr_irq14(void);
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extern void _x86_isr_irq15(void);
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