x86/port: add delay wrappers for x86_io_wait()

arch/x86/include/arch/port.h

@@ -130,6 +130,24 @@ inline void x86_io_wait(void)
 	x86_outb(0x80, 0);
 }
 
+static __always_inline void x86_outb_wait(u16 port, u8 data)
+{
+	x86_outb(port, data);
+	x86_io_wait();
+}
+
+static __always_inline void x86_outw_wait(u16 port, u16 data)
+{
+	x86_outw(port, data);
+	x86_io_wait();
+}
+
+static __always_inline void x86_outl_wait(u16 port, u32 data)
+{
+	x86_outl(port, data);
+	x86_io_wait();
+}
+
 #endif /* not _ASM_SOURCE */
 
 /*

arch/x86/sys/irq.c

@@ -1,5 +1,10 @@
 /* See the end of this file for copyright and license terms. */
 
+/*
+ * Most of the PIC management stuff is taken directly from the OSDev wiki:
+ * <https://wiki.osdev.org/PIC>
+ */
+
 #include <arch/irq.h>
 #include <arch/port.h>
 #include <arch/trap.h>
@@ -35,34 +40,25 @@ void arch_irq_init(void)
 	x86_set_intr_gate(X86_VECT_IRQ(15), _x86_isr_irq15);
 
 	/* begin initialization sequence in cascade mode */
-	x86_outb(X86_PORT_PIC1_CMD, ICW1_INIT | ICW1_ICW4);
-	x86_io_wait();
-	x86_outb(X86_PORT_PIC2_CMD, ICW1_INIT | ICW1_ICW4);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC1_CMD, ICW1_INIT | ICW1_ICW4);
+	x86_outb_wait(X86_PORT_PIC2_CMD, ICW1_INIT | ICW1_ICW4);
 
 	/* tell PIC1 its offset into the vector table */
-	x86_outb(X86_PORT_PIC1_DATA, X86_VECT_IRQ_BASE);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC1_DATA, X86_VECT_IRQ_BASE);
 	/* tell PIC2 its offset into the vector table */
-	x86_outb(X86_PORT_PIC2_DATA, X86_VECT_IRQ_BASE + 8);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC2_DATA, X86_VECT_IRQ_BASE + 8);
 
 	/* tell PIC1 that PIC2 is cascading into it on IRQ 2 */
-	x86_outb(X86_PORT_PIC1_DATA, 1 << 2);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC1_DATA, 1 << 2);
 	/* tell PIC2 that it is the second controller in the cascade chain */
-	x86_outb(X86_PORT_PIC2_DATA, 2);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC2_DATA, 2);
 
 	/* don't ask me what the fuck this does */
-	x86_outb(X86_PORT_PIC1_DATA, ICW4_8086);
-	x86_io_wait();
-	x86_outb(X86_PORT_PIC2_DATA, ICW4_8086);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC1_DATA, ICW4_8086);
+	x86_outb_wait(X86_PORT_PIC2_DATA, ICW4_8086);
 
 	/* mask all IRQs */
-	x86_outb(X86_PORT_PIC1_DATA, 0xff);
-	x86_io_wait();
+	x86_outb_wait(X86_PORT_PIC1_DATA, 0xff);
 	x86_outb(X86_PORT_PIC2_DATA, 0xff);
 }