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x86: move common setup checks to shared file

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This should also kind of fix the build.
I don't know whether that's actually the case
because i haven't tried tho lmao.
This commit is contained in:
anna 2021-11-15 17:50:00 +01:00
parent 24ae60225f
commit 52ac282ac8
Signed by: fef
GPG key ID: EC22E476DC2D3D84
11 changed files with 170 additions and 335 deletions
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15
arch/x86/boot/CMakeLists.txt
View file

@ -1,7 +1,8 @@
# See the end of this file for copyright and license terms. # Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved.
target_sources(gay_arch PRIVATE target_sources(gay_arch PRIVATE
multiboot.S multiboot.S
util.S
boot.c boot.c
) )
@ -10,15 +11,3 @@ if(X86_ARCH STREQUAL "amd64")
else() else()
target_sources(gay_arch PRIVATE setup32.S) target_sources(gay_arch PRIVATE setup32.S)
endif() endif()
# This file is part of GayBSD.
# Copyright (c) 2021 fef <owo@fef.moe>.
#
# GayBSD is nonviolent software: you may only use, redistribute, and/or
# modify it under the terms of the Cooperative Nonviolent Public License
# (CNPL) as found in the LICENSE file in the source code root directory
# or at <https://git.pixie.town/thufie/npl-builder>; either version 7
# of the license, or (at your option) any later version.
#
# GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
# permitted by applicable law. See the CNPL for details.

46
arch/x86/boot/multiboot.S
View file

@ -1,4 +1,4 @@
/* See the end of this file for copyright and license terms. */ /* Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved. */
#include <asm/common.h> #include <asm/common.h>
#include <gay/config.h> #include <gay/config.h>
@ -28,36 +28,6 @@ header_start: /* struct mb2_header */
/* checksum */ /* checksum */
.long (1 << 33) - MB2_HEADER_MAGIC - MB2_ARCHITECTURE_I386 - (header_end - header_start) .long (1 << 33) - MB2_HEADER_MAGIC - MB2_ARCHITECTURE_I386 - (header_end - header_start)
.align MB2_TAG_ALIGN
address_tag_start: /* struct mb2_header_tag_address */
/* type */
.short MB2_HEADER_TAG_ADDRESS
/* flags */
.short MB2_HEADER_TAG_OPTIONAL
/* low_size */
.long address_tag_end - address_tag_start
/* header_addr */
.long header_start
/* load_addr */
.long _image_start_phys
/* load_end_addr */
.long _kernel_end_phys
/* bss_end_addr */
.long _image_end_phys
address_tag_end:
.align MB2_TAG_ALIGN
entry_address_tag_start: /* struct mb2_header_tag_entry_address */
/* type */
.short MB2_HEADER_TAG_ENTRY_ADDRESS
/* flags */
.short MB2_HEADER_TAG_OPTIONAL
/* size */
.long entry_address_tag_end - entry_address_tag_start
/* entry_addr */
.long _start
entry_address_tag_end:
#if 0 /* TODO: implement graphics */ #if 0 /* TODO: implement graphics */
.align MB2_TAG_ALIGN .align MB2_TAG_ALIGN
framebuffer_tag_start: /* struct mb2_header_tag_framebuffer */ framebuffer_tag_start: /* struct mb2_header_tag_framebuffer */
@ -101,17 +71,3 @@ ASM_ENTRY(_start)
cli cli
jmp _setup jmp _setup
ASM_END(_start) ASM_END(_start)
/*
* This file is part of GayBSD.
* Copyright (c) 2021 fef <owo@fef.moe>.
*
* GayBSD is nonviolent software: you may only use, redistribute, and/or
* modify it under the terms of the Cooperative Nonviolent Public License
* (CNPL) as found in the LICENSE file in the source code root directory
* or at <https://git.pixie.town/thufie/npl-builder>; either version 7
* of the license, or (at your option) any later version.
*
* GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
* permitted by applicable law. See the CNPL for details.
*/

180
arch/x86/boot/setup32.S
View file

@ -1,9 +1,10 @@
/* See the end of this file for copyright and license terms. */ /* Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved. */
#include <asm/common.h> #include <asm/common.h>
#include <arch/page.h> #include <arch/page.h>
#include <arch/sched.h> #include <arch/sched.h>
#include <arch/segment.h>
#include <arch/vmparam.h> #include <arch/vmparam.h>
#include <gay/config.h> #include <gay/config.h>
@ -30,8 +31,14 @@
.extern _boot /* main boot routine -- see ./boot.c */ .extern _boot /* main boot routine -- see ./boot.c */
.extern pd0 /* initial page directory -- see ../mm/page.c */ .extern pd0 /* initial page directory -- see ../mm/i386/page.c */
.extern pt0 /* first page table -- see ../mm/page.c */ .extern pt0 /* first page table -- see ../mm/i386/page.c */
.extern _x86_gdt_desc /* GDT Descriptor -- see ../mm/segment.S */
.extern _x86_write_tss_base
.extern _x86_check_multiboot
.extern _x86_check_cpuid
.section .multiboot.text, "ax", @progbits .section .multiboot.text, "ax", @progbits
@ -39,80 +46,63 @@
* referencing symbols from C requires subtracting the relocation offset * referencing symbols from C requires subtracting the relocation offset
* first because the C code is linked against virtual address space * first because the C code is linked against virtual address space
*/ */
#define phys_addr(c_symbol) (c_symbol - KERN_OFFSET) #define PADDR(c_symbol) (c_symbol - KERNBASE)
ASM_ENTRY(_setup) ENTRY(_setup)
/* /*
* The kernel image starts at 1 MiB into physical memory. * set up initial stack frame
* We currently assume the kernel is < 3 MiB
* and therefore can be mapped within a single page table.
* As the kernel gets more and more bloated, this might not be the case
* in the future anymore, so we should ideally add support for multiple
* page tables soon.
*/ */
mov $phys_addr(pt0), %edi movl $PADDR(stack_top), %esp
xor %esi, %esi pushl $0
movl %esp, %ebp
pushl %ebx /* save multiboot tag address */
/* check multiboot magic number */
pushl %eax
call _x86_check_multiboot
addl $4, %esp
/* /*
* GRUB stores the multiboot tags right after the kernel image (afaik). * check if the CPUID instruction is supported
* The previous streategy was to stop the loop after having reached the * (prints an error and halts if not)
* end of the kernel image (including bss), and keep our fingers crossed
* that the multiboot tags all fit into the space between the end of the
* kernel image and the end of that last page so it's still mapped.
* Now, we just continue mapping until we have reached the last slot in
* the page table and exit the loop only then (the last slot is for the
* BIOS character framebuffer, see below).
*/ */
mov $1023, %ecx call _x86_check_cpuid
1: cmp $_image_start_phys, %esi /*
jl 2f /* don't map pages below the start of the kernel image */ * load the base values for kernel and user TSS into the corresponding GDT entries
*/
pushl $PADDR(_x86_kern_tss)
pushl $PADDR(_x86_gdt + X86_KERN_TSS)
call _x86_write_tss_base
pushl $PADDR(_x86_user_tss)
pushl $PADDR(_x86_gdt + X86_USER_TSS)
call _x86_write_tss_base
addl $16, %esp
mov %esi, %edx /*
or $0x003, %edx /* set present and rw flags, see below */ * identity map the entire low memory (~ 258 MB)
mov %edx, (%edi) */
movl $(KERN_LENGTH >> HUGEPAGE_SHIFT), %ecx
movl $0x083, %esi /* page flags: present, writeable, huge */
movl $PADDR(pd0), %edi /* pd entry */
2: add $PAGE_SIZE, %esi /* advance to next physical page address */ 1: movl %esi, (%edi)
add $4, %edi /* advance to next pointer in the page table */ addl $HUGEPAGE_SIZE, %esi
addl $4, %edi
loop 1b loop 1b
/* /*
* Conveniently, the full VGA character framebuffer fits into one page * mirror that mapping to high memory (KERNBASE)
* and even starts at a page aligned address. The physical range
* 0x000b8000 - 0x000b8fff
* gets mapped to the virtual address range
* 0xf03ff000 - 0xf03fffff
* which is the last page of our 4 MiB page table (index 1023).
* We also set the Present and RW bits by OR'ing with 0x003.
*/ */
movl $(0x000b8000 | 0x003), (%edi) movl $(KERN_LENGTH >> HUGEPAGE_SHIFT), %ecx
movl $0x183, %esi /* page flags: present, writeable, huge, global */
movl $PADDR(pd0 + (KERNBASE >> HUGEPAGE_SHIFT) * 4), %edi /* pd entry */
/* 2: movl %esi, (%edi)
* We are mapping the lowest 4 MiB of physical memory both to itself and addl $HUGEPAGE_SIZE, %esi
* to the relocated region. Thus, the physical address range: addl $4, %edi
* 0x00000000 - 0x003fffff loop 2b
* becomes available at two virtual address ranges:
* 0x00000000 - 0x003fffff (identity mapping)
* 0xf0000000 - 0xf03fffff (highmem mapping)
*
* The identity mapping is necessary because when we turn on paging in
* the next lines, the program counter still refers to physical memory
* and would thus immediately cause a page fault.
*
* The address of pt0 is OR'd with 0x003 (we actually have to add here
* because of dumb compiler stuff but that doesn't matter because the
* result is the same) to set the Present and RW flags in the page table
* entry (the lower 12 bits in page table addresses are always zero
* because they are page aligned so they are used as flags for the MMU,
* see ../include/arch/page.h).
*
* The offset added to pd0 is the page table number multiplied with the
* size of a page directory entry (4 bytes). The page table number can
* be calculated by dividing the number of the first page it maps
* through the total number of entries in the page directory.
*/
movl $(phys_addr(pt0) + 0x003), phys_addr(pd0) + (( 0x00000000 / PAGE_SIZE) / 1024) * 4
movl $(phys_addr(pt0) + 0x003), phys_addr(pd0) + ((KERN_OFFSET / PAGE_SIZE) / 1024) * 4
/* /*
* The last entry in the page directory points to itself. * The last entry in the page directory points to itself.
@ -123,7 +113,7 @@ ASM_ENTRY(_setup)
* because the page directory is being interpreted as a page table. * because the page directory is being interpreted as a page table.
* This allows us to manipulate the table while we are in virtual memory. * This allows us to manipulate the table while we are in virtual memory.
*/ */
movl $(phys_addr(pd0) + 0x003), phys_addr(pd0) + 1023 * 4 /* 0xffc00000 */ movl $(PADDR(pd0) + 0x003), PADDR(pd0) + 1023 * 4 /* 0xffc00000 */
/* set the Page Size Extensions (4) and Page Global Enable (7) bits in cr4 */ /* set the Page Size Extensions (4) and Page Global Enable (7) bits in cr4 */
mov %cr4, %ecx mov %cr4, %ecx
@ -131,7 +121,7 @@ ASM_ENTRY(_setup)
mov %ecx, %cr4 mov %ecx, %cr4
/* put the (physical) address of pd0 into cr3 so it will be used */ /* put the (physical) address of pd0 into cr3 so it will be used */
mov $phys_addr(pd0), %ecx mov $PADDR(pd0), %ecx
mov %ecx, %cr3 mov %ecx, %cr3
/* set the Paging (31) and Write Protect (16) bits in cr0 */ /* set the Paging (31) and Write Protect (16) bits in cr0 */
@ -152,70 +142,56 @@ ASM_ENTRY(_setup)
* the actual code flow makes a jump from low (.multiboot.text section) * the actual code flow makes a jump from low (.multiboot.text section)
* to high memory (.text section). * to high memory (.text section).
*/ */
ASM_END(_setup) END(_setup)
.text .text
.extern x86_replace_gdt ENTRY(_setup_highmem)
.extern x86_load_idt addl $KERNBASE, %esp
addl $KERNBASE, %ebp
ASM_ENTRY(_setup_highmem)
/* /*
* Now that we've completely transitioned to high memory, we can remove * Now that we've completely transitioned to high memory, we can remove
* the identity mapping because we don't need it anymore. * the identity mapping because we don't need it anymore.
*/ */
movl $0, pd0 + 0 * 4 movl $(KERN_LENGTH >> HUGEPAGE_SHIFT), %ecx
xor %esi, %esi
movl pd0, %edi
1: movl %esi, (%edi)
addl $4, %edi
loop 1b
/* bonk the TLB by reloading cr3 to apply the updated page table */ /* bonk the TLB by reloading cr3 to apply the updated page table */
mov %cr3, %ecx mov %cr3, %ecx
mov %ecx, %cr3 mov %ecx, %cr3
/* set up the initial stack frame */ /* replace the GDT provided by the bootloader (if any) with our own */
mov $stack_top, %ebp lgdt _x86_gdt_desc
mov %ebp, %esp ljmp $(X86_32_KERN_CS), $1f
pushl $0 /* cpu number, see smp_cpuid() in arch/smp.h */ 1: movl $(X86_KERN_DS), %ecx
movw %cx, %ds
movw %cx, %es
movw %cx, %fs
movw %cx, %gs
movw %cx, %ss
/* reset EFLAGS */ /* reset EFLAGS */
pushl $0 pushl $0
popf popf
/* these are set by GRUB, see the comment at the beginning of _start */ addl $KERNBASE, %ebx
/* parameter 2 for _boot() is header address */
push %ebx push %ebx
/* parameter 1 for _boot() is MB2_BOOTLOADER_MAGIC */
push %eax
/*
* but before we call _boot(), we replace the GDT provided by GRUB
* with our own (arch/mm/segment.S) and load the IDT (arch/sys/idt.S).
*/
call x86_replace_gdt
call _boot call _boot
/* this should never(TM) be reached */ /* this should never(TM) be reached */
cli cli
3: hlt 2: hlt
jmp 3b jmp 2b
ASM_END(_setup_highmem) END(_setup_highmem)
.section .bootstrap_stack, "aw", @nobits .section .bootstrap_stack, "aw", @nobits
.align KERN_STACK_SIZE .align KERN_STACK_SIZE
stack_bottom: stack_bottom:
.skip KERN_STACK_SIZE .skip KERN_STACK_SIZE
stack_top: stack_top:
/*
* This file is part of GayBSD.
* Copyright (c) 2021 fef <owo@fef.moe>.
*
* GayBSD is nonviolent software: you may only use, redistribute, and/or
* modify it under the terms of the Cooperative Nonviolent Public License
* (CNPL) as found in the LICENSE file in the source code root directory
* or at <https://git.pixie.town/thufie/npl-builder>; either version 7
* of the license, or (at your option) any later version.
*
* GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
* permitted by applicable law. See the CNPL for details.
*/

134
arch/x86/boot/setup64.S
View file

@ -1,4 +1,4 @@
/* See the end of this file for copyright and license terms. */ /* Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved. */
#include <asm/common.h> #include <asm/common.h>
@ -48,48 +48,18 @@
/* GDT stuff -- see ../mm/segment.S */ /* GDT stuff -- see ../mm/segment.S */
.extern _x86_gdt_desc .extern _x86_gdt_desc
.extern _x86_gdt_desc_phys .extern _x86_gdt_desc_phys
.extern _x86_kern_tss
.extern _x86_user_tss .extern _x86_write_tss_base
.extern _x86_check_multiboot
.extern _x86_check_cpuid
.extern _x86_check_ext_cpuid
.extern _x86_check_ia32e
.section .multiboot.text, "ax", @progbits .section .multiboot.text, "ax", @progbits
/* C code is linked against high memory, this gets the physical address */ /* C code is linked against high memory, this gets the physical address */
#define PADDR(c_symbol) (c_symbol - KERNBASE) #define PADDR(c_symbol) (c_symbol - KERNBASE)
/*
* miscellaneous utility routines
*/
/* void fix_tss_base(u64 *gdt_entry, struct x86_tss *tss) */
L_ENTRY(fix_tss_base)
movl 4(%esp), %edi
movl 8(%esp), %eax
movw %ax, 2(%edi)
shrl $16, %eax
movb %al, 4(%edi)
movb %ah, 7(%edi)
ret
L_END(fix_tss_base)
/* void err_and_hlt(const char *message) */
L_ENTRY(err_and_hlt)
mov $0x000b8000, %edx
mov 4(%esp), %ecx
movb $0x4f, %ah /* BIOS color code: white text on red background */
1: movb (%ecx), %al
testb %al, %al
jz 2f
movw %ax, (%edx)
addl $2, %edx
incl %ecx
jmp 1b
2: cli /* interrupts should already be off, but it won't hurt */
hlt
jmp 2b
L_END(err_and_hlt)
/* /*
* actual setup routine * actual setup routine
*/ */
@ -99,6 +69,7 @@ ENTRY(_setup)
* set up the stack * set up the stack
*/ */
movl $PADDR(stack_top), %esp movl $PADDR(stack_top), %esp
/* XXX use the APIC for reading the CPU number */
pushl $0 /* CPU number -- see include/arch/smp.h */ pushl $0 /* CPU number -- see include/arch/smp.h */
pushl $0 /* two longwords to keep the stack 8 byte aligned */ pushl $0 /* two longwords to keep the stack 8 byte aligned */
movl %esp, %ebp movl %esp, %ebp
@ -109,59 +80,37 @@ ENTRY(_setup)
* the bootloader should have loaded the multiboot magic * the bootloader should have loaded the multiboot magic
* value into eax, check if that is really the case * value into eax, check if that is really the case
*/ */
cmp $MB2_BOOTLOADER_MAGIC, %eax push %eax
je 1f call _x86_check_multiboot
pushl $errmsg_no_multiboot addl $4, %esp
jmp err_and_hlt
/* /*
* check if the CPU supports the CPUID instruction * check if the CPU supports the CPUID instruction
* this is done by checking whether we can flip bit 21 in EFLAGS (??) * (prints an error and halt if it doesn't)
*/ */
1: pushf call _x86_check_cpuid
pop %eax
movl %eax, %ecx
xorl $(1 << 21), %eax
push %eax
popf
pushf
pop %eax
push %ecx /* restore original flags */
popf
cmp %eax, %ecx
jne 2f
pushl $errmsg_no_cpuid
jmp err_and_hlt
/* /*
* check if the CPU supports extended CPUID addresses * check if the CPU supports extended CPUID addresses
* (prints an error and halts if it doesn't)
*/ */
2: mov $0x80000000, %eax call _x86_check_ext_cpuid
cpuid
cmp $0x80000001, %eax
jae 3f
pushl $errmsg_no_ext_cpuid
jmp err_and_hlt
/* /*
* check if the CPU supports IA-32e mode * check if the CPU supports IA-32e mode
* (prints an error and halts if it doesn't)
*/ */
3: mov $0x80000001, %eax call _x86_check_ia32e
cpuid
test $(1 << 29), %edx
jnz 4f
pushl $errmsg_no_ia32e
jmp err_and_hlt
/* /*
* load the base values kernel and user TSS into the corresponding GDT entries * load the base values for kernel and user TSS into the corresponding GDT entries
*/ */
4: pushl $PADDR(_x86_kern_tss) pushl $PADDR(_x86_kern_tss)
pushl $PADDR(_x86_gdt + X86_KERN_TSS) pushl $PADDR(_x86_gdt + X86_KERN_TSS)
call fix_tss_base call _x86_write_tss_base
pushl $PADDR(_x86_user_tss) pushl $PADDR(_x86_user_tss)
pushl $PADDR(_x86_gdt + X86_USER_TSS) pushl $PADDR(_x86_gdt + X86_USER_TSS)
call fix_tss_base call _x86_write_tss_base
addl $16, %esp addl $16, %esp
/* /*
@ -197,9 +146,12 @@ ENTRY(_setup)
/* for the identity mapping */ /* for the identity mapping */
movl $0x00000083, PADDR(_pdp0) /* present (0), write (1), huge (7) */ movl $0x00000083, PADDR(_pdp0) /* present (0), write (1), huge (7) */
movl $0x40000083, PADDR(_pdp0 + 8) movl $0x40000083, PADDR(_pdp0 + 8)
/* for the -2GB at the end of virtual memory (we use the same PDP for both) */ /* For the -2GB at the end of virtual memory. We use the same PDP for
* both low and high memory, so techincally this creates a total of four
* mappings (+0 GB, +510 GB, -512 GB, -2 GB), but we remove all except
* the -2GB one once we have transitioned to high memory. */
movl $0x00000083, PADDR(_pdp0 + PDP_OFFSET(KERNBASE)) movl $0x00000083, PADDR(_pdp0 + PDP_OFFSET(KERNBASE))
movl $0x40000083, PADDR(_pdp0 + PDP_OFFSET(KERNBASE) + 8) movl $0x40000083, PADDR(_pdp0 + PDP_OFFSET(KERNBASE + 0x40000000))
movl $PADDR(_pdp0 + 0x003), PADDR(_pml4) /* present (0), write (1), huge (7) */ movl $PADDR(_pdp0 + 0x003), PADDR(_pml4) /* present (0), write (1), huge (7) */
movl $PADDR(_pdp0 + 0x003), PADDR(_pml4 + PML4_OFFSET(KERNBASE)) movl $PADDR(_pdp0 + 0x003), PADDR(_pml4 + PML4_OFFSET(KERNBASE))
@ -209,7 +161,7 @@ ENTRY(_setup)
movb $0x80, PADDR(_pml4 + PML4_OFFSET(X86_PMAP_OFFSET) + 7) /* NX bit */ movb $0x80, PADDR(_pml4 + PML4_OFFSET(X86_PMAP_OFFSET) + 7) /* NX bit */
/* /*
* ensure paging is disabled by clearing CR0.PG (bit 32) * ensure paging is disabled by clearing CR0.PG (bit 31)
*/ */
movl %cr0, %eax movl %cr0, %eax
andl $0x7fffffff, %eax andl $0x7fffffff, %eax
@ -271,7 +223,7 @@ L_END(trampoline)
.text .text
ASM_ENTRY(_setup_highmem) L_ENTRY(_setup_highmem)
/* /*
* update all pointers to virtual address space * update all pointers to virtual address space
*/ */
@ -309,38 +261,12 @@ ASM_ENTRY(_setup_highmem)
cli cli
2: hlt 2: hlt
jmp 2b jmp 2b
ASM_END(_setup_highmem) L_END(_setup_highmem)
.section .multiboot.data, "a", @progbits .section .multiboot.data, "a", @progbits
L_DATA(errmsg_no_multiboot)
.asciz "Invalid Multiboot 2 magic number in %eax"
L_END(errmsg_no_multiboot)
L_DATA(errmsg_no_cpuid)
.asciz "CPUID instruction not supported"
L_END(errmsg_no_cpuid)
L_DATA(errmsg_no_ext_cpuid)
.asciz "No extended CPUID features available"
L_END(errmsg_no_ext_cpuid)
L_DATA(errmsg_no_ia32e)
.asciz "CPU does not appear to support IA-32e mode"
L_END(errmsg_no_ia32e)
.section .bootstrap_stack, "aw", @nobits .section .bootstrap_stack, "aw", @nobits
.align 16384
stack_bottom: stack_bottom:
.skip 16384 /* 16 K for the stack should be plenty for now */ .skip 16384 /* 16 K for the stack should be plenty for now */
stack_top: stack_top:
/*
* This file is part of GayBSD.
* Copyright (c) 2021 fef <owo@fef.moe>.
*
* GayBSD is nonviolent software: you may only use, redistribute, and/or
* modify it under the terms of the Cooperative Nonviolent Public License
* (CNPL) as found in the LICENSE file in the source code root directory
* or at <https://git.pixie.town/thufie/npl-builder>; either version 7
* of the license, or (at your option) any later version.
*
* GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
* permitted by applicable law. See the CNPL for details.
*/

37
arch/x86/config/kernel32.ld
View file

@ -1,19 +1,18 @@
/* See the end of this file for copyright and license terms. */ /* Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved. */
OUTPUT_FORMAT("elf32-i386") OUTPUT_FORMAT("elf32-i386")
OUTPUT_ARCH(i386) OUTPUT_ARCH(i386)
/* not strictly needed because we produce a binary image but can't hurt */
ENTRY(_start) ENTRY(_start)
KERN_OFFSET = 0xf0000000; KERNBASE = 0xf0000000;
SECTIONS { SECTIONS {
. = CFG_KERN_ORIGIN; . = CFG_KERN_ORIGIN;
_image_start = . + KERN_OFFSET; _image_start = . + KERNBASE;
_image_start_phys = .; _image_start_phys = .;
_kernel_start = . + KERN_OFFSET; _kernel_start = . + KERNBASE;
_kernel_start_phys = .; _kernel_start_phys = .;
.multiboot.data : { .multiboot.data : {
@ -26,35 +25,35 @@ SECTIONS {
KEEP(*(.multiboot.text)) KEEP(*(.multiboot.text))
} }
. += KERN_OFFSET; . += KERNBASE;
/* /*
* All sections from here on are page aligned so we can * All sections from here on are page aligned so we can
* set different access permissions for each of them * set different access permissions for each of them
*/ */
.text ALIGN(4K) : AT(ADDR(.text) - KERN_OFFSET) { .text ALIGN(4K) : AT(ADDR(.text) - KERNBASE) {
_text_start = .; _text_start = .;
*(.text .text.* .gnu.linkonce.t.*) *(.text .text.* .gnu.linkonce.t.*)
_text_end = .; _text_end = .;
} }
.rodata ALIGN(4K) : AT(ADDR(.rodata) - KERN_OFFSET) { .rodata ALIGN(4K) : AT(ADDR(.rodata) - KERNBASE) {
_rodata_start = .; _rodata_start = .;
*(.rodata .rodata.* .gnu.linkonce.r.*) *(.rodata .rodata.* .gnu.linkonce.r.*)
_rodata_end = .; _rodata_end = .;
} }
.data ALIGN(4K) : AT(ADDR(.data) - KERN_OFFSET) { .data ALIGN(4K) : AT(ADDR(.data) - KERNBASE) {
_data_start = .; _data_start = .;
*(.data .data.*) *(.data .data.*)
_data_end = .; _data_end = .;
} }
_kernel_end = .; _kernel_end = .;
_kernel_end_phys = . - KERN_OFFSET; _kernel_end_phys = . - KERNBASE;
.bss ALIGN(4K) : AT(ADDR(.bss) - KERN_OFFSET) { .bss ALIGN(4K) : AT(ADDR(.bss) - KERNBASE) {
_bss_start = .; _bss_start = .;
*(COMMON) *(COMMON)
*(.bss) *(.bss)
@ -65,19 +64,5 @@ SECTIONS {
} }
_image_end = .; _image_end = .;
_image_end_phys = . - KERN_OFFSET; _image_end_phys = . - KERNBASE;
} }
/*
* This file is part of GayBSD.
* Copyright (c) 2021 fef <owo@fef.moe>.
*
* GayBSD is nonviolent software: you may only use, redistribute, and/or
* modify it under the terms of the Cooperative Nonviolent Public License
* (CNPL) as found in the LICENSE file in the source code root directory
* or at <https://git.pixie.town/thufie/npl-builder>; either version 7
* of the license, or (at your option) any later version.
*
* GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
* permitted by applicable law. See the CNPL for details.
*/

19
arch/x86/config/kernel64.ld
View file

@ -1,11 +1,10 @@
/* See the end of this file for copyright and license terms. */ /* Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved. */
OUTPUT_FORMAT("elf64-x86-64") OUTPUT_FORMAT("elf64-x86-64")
/* not strictly needed because we produce a binary image but can't hurt */
ENTRY(_start) ENTRY(_start)
KERNBASE = 0xffffffff80000000; KERNBASE = 0xffffffff80000000; /* -2 GB */
PAGE_SIZE = 4K; PAGE_SIZE = 4K;
SECTIONS { SECTIONS {
@ -66,17 +65,3 @@ SECTIONS {
_image_end = .; _image_end = .;
_image_end_phys = . - KERNBASE; _image_end_phys = . - KERNBASE;
} }
/*
* This file is part of GayBSD.
* Copyright (c) 2021 fef <owo@fef.moe>.
*
* GayBSD is nonviolent software: you may only use, redistribute, and/or
* modify it under the terms of the Cooperative Nonviolent Public License
* (CNPL) as found in the LICENSE file in the source code root directory
* or at <https://git.pixie.town/thufie/npl-builder>; either version 7
* of the license, or (at your option) any later version.
*
* GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
* permitted by applicable law. See the CNPL for details.
*/

41
arch/x86/include/asm/common.h
View file

@ -1,4 +1,4 @@
/* See the end of this file for copyright and license terms. */ /* Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved. */
#pragma once #pragma once
@ -6,25 +6,34 @@
#error "This header is only intended to be included from assembly files" #error "This header is only intended to be included from assembly files"
#endif #endif
#define ASM_ENTRY(name) \ #define ENTRY(name) \
.global name; \ .global name; \
.type name, @function; \ .type name, @function; \
.align 4; \ .align 4; \
name: name:
#define ASM_END(name) \ #define DATA(name) \
.global name; \
.type name, @object; \
name:
#define END(name) \
.size name, . - name .size name, . - name
/* /* for legacy code, use ENTRY() and END() instead */
* This file is part of GayBSD. #define ASM_ENTRY(name) ENTRY(name)
* Copyright (c) 2021 fef <owo@fef.moe>. #define ASM_END(name) END(name)
*
* GayBSD is nonviolent software: you may only use, redistribute, and/or /* local (non-global) subroutine entry point */
* modify it under the terms of the Cooperative Nonviolent Public License #define L_ENTRY(name) \
* (CNPL) as found in the LICENSE file in the source code root directory .type name, @function; \
* or at <https://git.pixie.town/thufie/npl-builder>; either version 7 .align 4; \
* of the license, or (at your option) any later version. name:
*
* GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent /* local (non-global) data field */
* permitted by applicable law. See the CNPL for details. #define L_DATA(name) \
*/ .type name, @object; \
name:
#define L_END(name) \
.size name, . - name

14
arch/x86/mm/CMakeLists.txt
View file

@ -1,18 +1,8 @@
# See the end of this file for copyright and license terms. # Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved.
target_sources(gay_arch PRIVATE target_sources(gay_arch PRIVATE
page.c page.c
segment.S segment.S
) )
# This file is part of GayBSD. add_subdirectory("${X86_ARCH}")
# Copyright (c) 2021 fef <owo@fef.moe>.
#
# GayBSD is nonviolent software: you may only use, redistribute, and/or
# modify it under the terms of the Cooperative Nonviolent Public License
# (CNPL) as found in the LICENSE file in the source code root directory
# or at <https://git.pixie.town/thufie/npl-builder>; either version 7
# of the license, or (at your option) any later version.
#
# GayBSD comes with ABSOLUTELY NO WARRANTY, to the extent
# permitted by applicable law. See the CNPL for details.

5
arch/x86/mm/amd64/CMakeLists.txt Normal file
View file

@ -0,0 +1,5 @@
# Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved.
target_sources(gay_arch PRIVATE
page.c
)

5
arch/x86/mm/i386/CMakeLists.txt Normal file
View file

@ -0,0 +1,5 @@
# Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved.
target_sources(gay_arch PRIVATE
page.c
)

9
arch/x86/sys/amd64/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
# Copyright (C) 2021 fef <owo@fef.moe>. All rights reserved.
target_sources(gay_arch PRIVATE
idt.S
irq.S
switch.S
systm.c
trap.S
)