2021-02-28 02:18:39 +01:00
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/* See the end of this file for copyright, license, and warranty information. */
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2020-06-12 11:49:20 +02:00
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2021-07-31 19:39:51 +02:00
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#include <arch-generic/sched.h>
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#include <arch/hardware.h>
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#include <arch/interrupt.h>
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2020-11-29 20:23:27 +01:00
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2020-12-01 02:35:06 +01:00
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#include <ardix/atomic.h>
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2020-06-12 11:49:20 +02:00
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#include <ardix/sched.h>
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2020-11-29 20:23:27 +01:00
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2021-02-28 18:27:43 +01:00
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#include <string.h>
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2021-02-01 00:07:45 +01:00
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extern struct task *_sched_current_task;
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2020-10-10 23:15:47 +02:00
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void irq_sys_tick(void)
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2020-06-12 11:49:20 +02:00
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{
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/*
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* fire a PendSV interrupt and do the actual context switching there
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* because it is faster that way (according to the docs, at least)
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*/
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2020-12-01 02:35:06 +01:00
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if (!is_atomic_context())
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2020-11-30 02:33:11 +01:00
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arch_irq_invoke(IRQNO_PEND_SV);
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2020-06-17 20:40:22 +02:00
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}
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/**
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* Set the NVIC priority grouping field in `AIRCR`.
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* Only values from 0..7 are allowed, see the SAM3X documentation.
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*
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* @param prio_group: The new priority grouping value.
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*/
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static inline void sched_nvic_set_prio_group(uint32_t prio_group)
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{
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uint32_t reg_val = REG_SCB_AIRCR;
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reg_val &= ~(REG_SCB_AIRCR_VECTKEY_MASK | REG_SCB_AIRCR_PRIGROUP_MASK);
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reg_val = reg_val
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| REG_SCB_AIRCR_VECTKEY_VAL(REG_SCB_AIRCR_VECTKEY_MAGIC)
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| REG_SCB_AIRCR_PRIGROUP_VAL(prio_group);
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REG_SCB_AIRCR = reg_val;
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}
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2020-11-29 20:23:27 +01:00
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int arch_sched_hwtimer_init(unsigned int freq)
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2020-06-14 05:51:01 +02:00
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{
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2020-06-17 20:40:22 +02:00
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uint32_t ticks = sys_core_clock / freq;
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2020-06-14 05:51:01 +02:00
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if (ticks > REG_SYSTICK_LOAD_RELOAD_MASK)
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return 1;
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2020-06-17 20:40:22 +02:00
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/* Ensure SysTick and PendSV are preemptive */
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sched_nvic_set_prio_group(0b011);
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2020-06-14 05:51:01 +02:00
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REG_SYSTICK_LOAD = (ticks & REG_SYSTICK_LOAD_RELOAD_MASK) - 1;
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REG_SYSTICK_VAL = 0U;
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REG_SYSTICK_CTRL = REG_SYSTICK_CTRL_CLKSOURCE_BIT /* MCK */
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| REG_SYSTICK_CTRL_TICKINT_BIT /* trigger exception */
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| REG_SYSTICK_CTRL_ENABLE_BIT; /* enable SysTick */
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return 0;
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}
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2021-02-01 00:07:45 +01:00
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void arch_sched_task_init(struct task *task, void (*entry)(void))
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2020-06-14 05:51:01 +02:00
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{
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2021-02-01 00:07:45 +01:00
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struct reg_snapshot *regs = task->stack_bottom - sizeof(*regs);
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task->sp = regs;
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2020-06-14 05:51:01 +02:00
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2020-11-29 20:23:27 +01:00
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memset(regs, 0, sizeof(*regs));
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2020-11-29 22:01:35 +01:00
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regs->hw.pc = entry;
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2020-11-30 03:01:02 +01:00
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regs->hw.psr = 0x01000000U;
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regs->sw.lr = (void *)0xFFFFFFF9U;
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2020-06-17 20:40:22 +02:00
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}
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2021-02-01 00:07:45 +01:00
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void sched_yield(enum task_state state)
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2020-06-17 20:40:22 +02:00
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{
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REG_SYSTICK_VAL = 0U; /* Reset timer */
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2021-02-01 00:07:45 +01:00
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_sched_current_task->state = state;
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2020-11-29 22:01:35 +01:00
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arch_irq_invoke(IRQNO_PEND_SV);
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2020-06-12 11:49:20 +02:00
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}
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2020-10-11 19:35:30 +02:00
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/*
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2021-02-28 02:18:39 +01:00
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* This file is part of Ardix.
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* Copyright (c) 2020, 2021 Felix Kopp <owo@fef.moe>.
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2020-10-11 19:35:30 +02:00
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*
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2021-05-10 16:19:38 +02:00
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* Ardix is non-violent software: you may only use, redistribute,
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* and/or modify it under the terms of the CNPLv6+ as found in
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* the LICENSE file in the source code root directory or at
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* <https://git.pixie.town/thufie/CNPL>.
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2020-10-11 19:35:30 +02:00
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*
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2021-05-10 16:19:38 +02:00
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* Ardix comes with ABSOLUTELY NO WARRANTY, to the extent
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* permitted by applicable law. See the CNPLv6+ for details.
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2020-10-11 19:35:30 +02:00
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*/
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