SERIAL FINALLY FUCKING WORKS OMG

pull/1/head
Felix Kopp 4 years ago
parent ba9565a1b4
commit 7493c7a5ae
No known key found for this signature in database
GPG Key ID: C478BA0A85F75728

@ -9,18 +9,29 @@
#include <arch/at91sam3x8e/interrupt.h>
#include <arch/serial.h>
#include <stddef.h>
struct serial_interface arch_serial_default_interface = {
.tx = NULL,
.rx = NULL,
.id = 0,
.baud = 0,
};
struct serial_interface *serial_default_interface = &arch_serial_default_interface;
int arch_serial_init(struct serial_interface *interface)
{
if (interface->baud <= 0 || interface->id != 0)
return -1;
/* enable peripheral clock for UART (which has peripheral id 8) */
REG_PMC_PCER0 = REG_PMC_PCER0_PID(8);
REG_PMC_PCER0 |= REG_PMC_PCER0_PID(8);
/* UART is multiplexed with PIOA, so we need to enable that controller first */
REG_PIO_WPMR(PIOA) = REG_PIO_WPMR_WPEN_VAL(0); /* turn write protection off */
REG_PIO_PER(PIOA) = (1 << 8) | (1 << 9);
REG_PIO_WPMR(PIOA) = REG_PIO_WPMR_WPEN_VAL(1); /* turn write protection back on */
/* ensure the PIO controller is turned off on the serial pins */
REG_PIO_PDR(PIOA) = (1 << 8) | (1 << 9);
/* turn off PDC channel (we are manually writing byte-by-byte here) */
REG_UART_PDC_PTCR = REG_UART_PDC_PTCR_RXTDIS_MASK | REG_UART_PDC_PTCR_TXTDIS_MASK;
/* reset & disable rx and tx */
REG_UART_CR = REG_UART_CR_RXDIS_MASK | REG_UART_CR_RSTRX_MASK
@ -30,15 +41,16 @@ int arch_serial_init(struct serial_interface *interface)
REG_UART_MR = REG_UART_MR_PAR_NO | REG_UART_MR_CHMODE_NORMAL;
/* From Atmel Datasheet: baud rate = MCK / (REG_UART_BRGR * 16) */
REG_UART_BRGR = (uint16_t)((sys_core_clock / (uint32_t)interface->baud) >> 4);
REG_UART_BRGR = (uint16_t)(( sys_core_clock / (uint32_t)interface->baud ) >> 4);
/* choose the events we want an interrupt on */
REG_UART_IDR = 0xFFFFFFFF; /* make sure all interrupts are disabled first */
REG_UART_IER = REG_UART_IER_RXRDY_MASK | REG_UART_IER_OVRE_MASK | REG_UART_IER_FRAME_MASK;
/* TXRDY is not selected because the output buffer is initially empty anyway */
REG_UART_IER = REG_UART_IER_RXRDY_MASK | REG_UART_IER_OVRE_MASK | REG_UART_IER_FRAME_MASK | REG_UART_IER_TXRDY_MASK;
arch_irq_enable(IRQNO_UART);
/* enable transmitter and receiver */
/* enable receiver and transmitter */
REG_UART_CR = REG_UART_CR_RXEN_MASK | REG_UART_CR_TXEN_MASK;
return 0;
@ -49,43 +61,55 @@ void arch_serial_exit(struct serial_interface *interface)
if (interface->id != 0)
return;
/* disable receiver and transmitter */
REG_UART_CR = REG_UART_CR_RXDIS_MASK | REG_UART_CR_TXDIS_MASK;
arch_irq_disable(IRQNO_UART);
/* disable I/O line */
REG_PIO_WPMR(PIOA) = REG_PIO_WPMR_WPEN_VAL(1);
REG_PIO_PER(PIOA) = (1 << 8) | (1 << 9);
REG_PIO_WPMR(PIOA) = REG_PIO_WPMR_WPEN_VAL(0);
/* disable peripheral clock for UART */
/* disable peripheral clock for UART (PID is taken from Atmel Datasheet, Section 9.1 */
REG_PMC_PCDR0 = REG_PMC_PCDR0_PID(8);
}
int arch_serial_op_begin(struct serial_interface *interface)
{
/* TODO */
return -1;
interface->id = -1;
}
ssize_t arch_serial_op_read(struct serial_interface *interface)
void arch_serial_notify(struct serial_interface *interface)
{
/* TODO */
return 0;
/* unmask the TXRDY interrupt */
REG_UART_IER = REG_UART_IER_TXRDY_MASK;
}
ssize_t arch_serial_op_write(struct serial_interface *interface)
void irq_uart(void)
{
/* TODO */
return 0;
uint8_t tmp;
size_t len;
uint32_t state = REG_UART_SR;
/* RX has received a byte, store it into the ring buffer */
if (state & REG_UART_SR_RXRDY_MASK) {
tmp = REG_UART_RHR;
ringbuf_write(serial_default_interface->rx, &tmp, sizeof(tmp));
}
/* TX is ready to transmit the next byte */
if (state & REG_UART_SR_TXRDY_MASK) {
len = ringbuf_read(&tmp, serial_default_interface->tx, sizeof(tmp));
if (len) {
/* there is data in the queue, so write it to TX holding register */
REG_UART_THR = tmp;
} else {
/* TX queue is empty, mask the TXRDY event */
REG_UART_IDR = REG_UART_IDR_TXRDY_MASK;
}
}
/* check for error conditions */
if ((state & REG_UART_SR_OVRE_MASK) || (state & REG_UART_SR_FRAME_MASK)) {
/* TODO: write some proper error handling routines ffs */
REG_UART_CR = REG_UART_CR_RSTSTA_MASK;
}
}
struct serial_operations arch_serial_operations = {
.begin = &arch_serial_op_begin,
.read = &arch_serial_op_read,
.write = &arch_serial_op_write,
};
/*
* Copyright (c) 2020 Felix Kopp <sandtler@sandtler.club>
*

@ -5,11 +5,18 @@
#include <ardix/serial.h>
extern struct serial_operations arch_serial_operations;
int arch_serial_init(struct serial_interface *interface);
void arch_serial_exit(struct serial_interface *interface);
/**
* Notify the serial interface about new data in the TX buffer.
* This is required because if the transmitter is sleeping due to the TX queue being empty,
* we need some way to tell it to turn on and fire interrupts again.
*
* @param interface: The serial interface to notify about new data.
*/
void arch_serial_notify(struct serial_interface *interface);
#ifdef ARCH_AT91SAM3X8E
#include <arch/at91sam3x8e/serial.h>
#else

@ -12,24 +12,11 @@
#define SERIAL_BUFSZ 64
#endif
struct serial_interface;
/** Low-level hardware operations implemented by the serial driver. */
struct serial_operations {
/** Do any hardware setup required to transmit data. */
int (*begin)(struct serial_interface *serial);
/** Read from the hardware input buffer and store it into the rx ring buffer */
ssize_t (*read)(struct serial_interface *serial);
/** Read from the tx ring buffer and store it into the hardware output buffer */
ssize_t (*write)(struct serial_interface *serial);
};
struct serial_interface {
struct ringbuf *rx;
struct ringbuf *tx;
long int baud;
int id;
struct serial_operations operations;
};
/** The default serial console (this is where printk outputs to) */
@ -59,7 +46,7 @@ void serial_exit(struct serial_interface *interface);
* @param len: The maximum amount of bytes to read.
* @returns The actual amount of bytes read.
*/
ssize_t serial_read(uint8_t *dest, struct serial_interface *interface, size_t len);
ssize_t serial_read(void *dest, struct serial_interface *interface, size_t len);
/**
* Write data to the serial buffer.
@ -69,7 +56,7 @@ ssize_t serial_read(uint8_t *dest, struct serial_interface *interface, size_t le
* @param len: The length of `data`.
* @returns The actual amount of bytes written.
*/
ssize_t serial_write(struct serial_interface *interface, const uint8_t *data, size_t len);
ssize_t serial_write(struct serial_interface *interface, const void *data, size_t len);
/*
* Copyright (c) 2020 Felix Kopp <sandtler@sandtler.club>

@ -44,16 +44,17 @@ void serial_exit(struct serial_interface *interface)
interface->id = -1;
}
/* TODO: tell the scheduler to run the I/O thread next after these calls */
ssize_t serial_read(uint8_t *dest, struct serial_interface *interface, size_t len)
ssize_t serial_read(void *dest, struct serial_interface *interface, size_t len)
{
return (ssize_t)ringbuf_read(dest, interface->rx, len);
}
ssize_t serial_write(struct serial_interface *interface, const uint8_t *data, size_t len)
ssize_t serial_write(struct serial_interface *interface, const void *data, size_t len)
{
return (ssize_t)ringbuf_write(interface->tx, data, len);
ssize_t ret = (ssize_t)ringbuf_write(interface->tx, data, len);
if (ret > 0)
arch_serial_notify(interface);
return ret;
}
/*

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