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@ -339,8 +339,38 @@ struct reg_snapshot {
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/** UART Receiver Holding Register */
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#define REG_UART_THR (*(uint8_t *)0x400E081CU)
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/** UART Baud Rate Generator Register */
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#define REG_UART_BRGR (*(uint16_t *)0x400E0820U)
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/* UART PDC Area */
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/** UART PDC Receive Pointer Register */
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#define REG_UART_PDC_RPR (*(uint32_t *)0x400E0900U)
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/** UART PDC Receive Counter Register */
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#define REG_UART_PDC_RCR (*(uint32_t *)0x400E0904U)
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/** UART PDC Transmit Pointer Register */
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#define REG_UART_PDC_TPR (*(uint32_t *)0x400E0908U)
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/** UART PDC Transmit Counter Register */
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#define REG_UART_PDC_TCR (*(uint32_t *)0x400E090CU)
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/** UART PDC Receive Next Pointer Register */
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#define REG_UART_PDC_RNPR (*(uint32_t *)0x400E0910U)
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/** UART PDC Receive Next Counter Register */
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#define REG_UART_PDC_RNCR (*(uint32_t *)0x400E0914U)
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/** UART PDC Transmit Next Pointer Register */
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#define REG_UART_PDC_TNPR (*(uint32_t *)0x400E0918U)
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/** UART PDC Transmit Next Counter Register */
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#define REG_UART_PDC_TNCR (*(uint32_t *)0x400E091CU)
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/** UART PDC Transfer Control Register */
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#define REG_UART_PDC_PTCR (*(uint32_t *)0x400E0920U)
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#define REG_UART_PDC_PTCR_TXTDIS_MASK ((uint32_t)1 << 9)
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#define REG_UART_PDC_PTCR_TXTEN_MASK ((uint32_t)1 << 8)
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#define REG_UART_PDC_PTCR_RXTDIS_MASK ((uint32_t)1 << 1)
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#define REG_UART_PDC_PTCR_RXTEN_MASK ((uint32_t)1 << 0)
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/** UART PDC Transfer Status Register */
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#define REG_UART_PDC_PTSR (*(uint32_t *)(0x400E0800U + 0x124C))
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/*
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* Nested Vectored Interrupt Controller
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*/
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@ -655,13 +685,8 @@ struct reg_snapshot {
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/** PMC Write Protect Mode Register */
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#define REG_PMC_WPMR (*(uint32_t *)0x400E06E4U)
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/** PMC Write Protect Key bitmask (<< 8, 24 bits, needs to be `0x504D43` ("PMC")) */
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#define REG_PMC_WPMR_WPKEY_MASK ((uint32_t)0xFFFFFF << 8)
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#define REG_PMC_WPMR_WPKEY_VAL(x) \
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( ((uint32_t)(x) << 8) & REG_PMC_WPMR_WPKEY_MASK )
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#define REG_PMC_WPMR_WPKEY_MAGIC (0x504D43) /* "PMC" in ASCII */
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/** PMC Write Protect Enable bitmask */
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#define REG_PMC_WPMR_WPEN_BIT ((uint32_t)1)
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#define REG_PMC_WPMR_WPKEY_MAGIC (0x504D43 << 8) /* "PMC" in ASCII */
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#define REG_PMC_WPMR_WPEN_VAL(x) ((uint32_t)(x) | REG_PMC_WPMR_WPKEY_MAGIC)
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/** PMC Write Protect Status Register */
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#define REG_PMC_WPSR (*(uint32_t *)0x400E06E8U)
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