os/doc
3
0
Fork 0
Code Issues Pull requests Projects Releases Wiki Activity

Whitespace-only fixes, translators please ignore.

Browse source
This commit is contained in:
Warren Block 2016-04-20 14:32:02 +00:00
parent de46c13dc2
commit 0fc7a1eade
Notes: svn2git 2020-12-08 03:00:23 +00:00 
svn path=/head/; revision=48687
1 changed files with 21 additions and 37 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

58
en_US.ISO8859-1/htdocs/news/status/report-2016-01-2016-03.xml
View file

@ -230,10 +230,10 @@
<help>
<task>
<p>The pNFS server will be in need of testing during development
or it will never progress to a near-production status. I
hope to have code available in &os;'s Subversion project
branch for testing in late spring 2016.</p>
<p>The pNFS server will be in need of testing during
development or it will never progress to a near-production
status. I hope to have code available in &os;'s Subversion
project branch for testing in late spring 2016.</p>
</task>
</help>
</project>
@ -258,13 +258,13 @@
<body>
<p>This project aims to enable the use of the Signal Processing
Engine found in the NXP/Freescale e500v2 SoC. The SPE uses
opcodes overlapping with those of Altivec, so they are mutually
exclusive. Additionally, the e500v2 does not have a traditional
FPU, and instead uses the SPE for all floating point operations
(or emulation, as is currently done). Combined with the fact
that the SPE ABI is incompatible with the traditional ABI, a new
MACHINE_ARCH has been created to address these
incompatibilities.</p>
opcodes overlapping with those of Altivec, so they are
mutually exclusive. Additionally, the e500v2 does not have a
traditional FPU, and instead uses the SPE for all floating
point operations (or emulation, as is currently done).
Combined with the fact that the SPE ABI is incompatible with
the traditional ABI, a new MACHINE_ARCH has been created to
address these incompatibilities.</p>
<p>A project branch has been created for the work. A
powerpcspe kernel boots on the RouterBoard RB800, and the base
@ -556,8 +556,8 @@
</ul>
<p>The driver supports all available Ethernet connections (1,
10, 30 Gbps) and the system can saturate a 10 Gbps link (on Tx)
using 4 CPU cores.</p>
10, 30 Gbps) and the system can saturate a 10 Gbps link (on
Tx) using 4 CPU cores.</p>
<ul>
<li>Significantly improved overall I/O performance:</li>
@ -577,13 +577,9 @@
basis.</p>
</body>
<sponsor>
Cavium
</sponsor>
<sponsor>Cavium</sponsor>
<sponsor>
Semihalf
</sponsor>
<sponsor>Semihalf</sponsor>
<help>
<task>
@ -997,9 +993,7 @@
</ul>
</body>
<sponsor>
EMC / Isilon Storage Division
</sponsor>
<sponsor>EMC / Isilon Storage Division</sponsor>
<help>
<task>
@ -1075,9 +1069,7 @@
Mateusz Guzik.</p>
</body>
<sponsor>
EMC / Isilon Storage Division
</sponsor>
<sponsor>EMC / Isilon Storage Division</sponsor>
<help>
<task>
@ -1133,9 +1125,7 @@
logins once configured).</p>
</body>
<sponsor>
Alex Perez (Inertial Computing)
</sponsor>
<sponsor>Alex Perez (Inertial Computing)</sponsor>
<help>
<task>
@ -1352,9 +1342,7 @@
checkout.</p>
</body>
<sponsor>
Mellanox Technologies
</sponsor>
<sponsor>Mellanox Technologies</sponsor>
</project>
@ -1519,9 +1507,7 @@
to publish the test cases for Azure soon.</p>
</body>
<sponsor>
Microsoft
</sponsor>
<sponsor>Microsoft</sponsor>
</project>
@ -1764,9 +1750,7 @@
</task>
</help>
<sponsor>
The FreeBSD Foundation
</sponsor>
<sponsor>The FreeBSD Foundation</sponsor>
</project>
<project cat='misc'>